An exact solution to simultaneous technology mapping and linear placement problem. - Jinan Lou; Amir H. Salek; Massoud Pedram (ICCAD, 1997)

An Integrated Flow for Technology Remapping and Placement of Sub-half-micron Circuits. - Jinan Lou; Amir H. Salek; Massoud Pedram (ASP-DAC, 1998)

A DSM Design Flow: Putting Floorplanning, Technology-Napping, and Gate-Placement Together. - Amir H. Salek; Jinan Lou; Massoud Pedram (DAC, 1998)

A simultaneous routing tree construction and fanout optimization algorithm. - Amir H. Salek; Jinan Lou; Massoud Pedram (ICCAD, 1998)

MERLIN: Semi-Order-Independent Hierarchical Buffered Routing Tree Generation Using Local Neighborhood Search. - Amir H. Salek; Jinan Lou; Massoud Pedram (DAC, 1999)

An integrated logical and physical design flow for deep submicron circuits. - Amir H. Salek; Jinan Lou; Massoud Pedram (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Hierarchical buffered routing tree generation. - Amir H. Salek; Jinan Lou; Massoud Pedram (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)