Exploiting Dead Value Information. - Milo M. K. Martin; Amir Roth; Charles N. Fischer (MICRO, 1997)

Dependance Based Prefetching for Linked Data Structures. - Amir Roth; Andreas Moshovos; Gurindar S. Sohi (ASPLOS, 1998)

Improving virtual function call target prediction via dependence-based pre-computation. - Amir Roth; Andreas Moshovos; Gurindar S. Sohi (International Conference on Supercomputing, 1999)

Effective Jump-Pointer Prefetching for Linked Data Structures. - Amir Roth; Gurindar S. Sohi (ISCA, 1999)

Register integration: a simple and efficient implementation of squash reuse. - Amir Roth; Gurindar S. Sohi (MICRO, 2000)

Speculative Data-Driven Multithreading. - Amir Roth; Gurindar S. Sohi (HPCA, 2001)

Speculative Multithreaded Processors. - Gurindar S. Sohi; Amir Roth (Computer, 2001)

Squash Reuse via a Simplified Implementation of Register Integration. - Amir Roth; Gurindar S. Sohi (J. Instr. Level Parallelism, 2001)

Dynamic techniques for load and load-use scheduling. - Amir Roth; Ronny Ronen; Avi Mendelson (Proc. IEEE, 2001)

Three extensions to register integration. - Vlad Petric; Anne Bracy; Amir Roth (MICRO, 2002)

A quantitative framework for automated pre-execution thread selection. - Amir Roth; Gurindar S. Sohi (MICRO, 2002)

DISE: A Programmable Macro Engine for Customizing Applications. - Marc L. Corliss; E. Christopher Lewis; Amir Roth (ISCA, 2003)

A DISE implementation of dynamic code decompression. - Marc L. Corliss; E. Christopher Lewis; Amir Roth (LCTES, 2003)

Dataflow Mini-Graphs: Amplifying Superscalar Capacity and Bandwidth. - Anne Bracy; Prashant Prahlad; Amir Roth (MICRO, 2004)

Low-Overhead Interactive Debugging via Dynamic Instrumentation with DISE. - Marc L. Corliss; E. Christopher Lewis; Amir Roth (HPCA, 2005)

Energy-Effectiveness of Pre-Execution and Energy-Aware P-Thread Selection. - Vlad Petric; Amir Roth (ISCA, 2005)

Store Vulnerability Window (SVW): Re-Execution Filtering for Enhanced Load Optimization. - Amir Roth (ISCA, 2005)

RENO - A Rename-Based Instruction Optimizer. - Vlad Petric; Tingting Sha; Amir Roth (ISCA, 2005)

Scalable Store-Load Forwarding via Store Queue Index Prediction. - Tingting Sha; Milo M. K. Martin; Amir Roth (MICRO, 2005)

Using DISE to protect return addresses from attack. - Marc L. Corliss; E. Christopher Lewis; Amir Roth (SIGARCH Comput. Archit. News, 2005)

The implementation and evaluation of dynamic code decompression using DISE. - Marc L. Corliss; E. Christopher Lewis; Amir Roth (ACM Trans. Embed. Comput. Syst., 2005)

Serialization-Aware Mini-Graphs: Performance with Fewer Resources. - Anne Bracy; Amir Roth (MICRO, 2006)

Store Vulnerability Window (SVW): A Filter and Potential Replacement for Load Re-Execution. - Amir Roth (J. Instr. Level Parallelism, 2006)

Ginger: control independence using tag rewriting. - Andrew D. Hilton; Amir Roth (ISCA, 2007)

NoSQ: Store-Load Communication without a Store Queue. - Tingting Sha; Milo M. K. Martin; Amir Roth (IEEE Micro, 2007)

Physical Register Reference Counting. - Amir Roth (IEEE Comput. Archit. Lett., 2008)

CPROB: Checkpoint Processing with Opportunistic Minimal Recovery. - Andrew D. Hilton; Neeraj Eswaran; Amir Roth (PACT, 2009)

Decoupled store completion/silent deterministic replay: enabling scalable data memory for CPR/CFP processors. - Andrew D. Hilton; Amir Roth (ISCA, 2009)

BOLT: Energy-efficient Out-of-Order Latency-Tolerant execution. - Andrew D. Hilton; Amir Roth (HPCA, 2010)

SMT-Directory: Efficient Load-Load Ordering for SMT. - Andrew D. Hilton; Amir Roth (IEEE Comput. Archit. Lett., 2010)

iCFP: Tolerating All-Level Cache Misses in In-Order Processors. - Andrew D. Hilton; Santosh Nagarakatte; Amir Roth (IEEE Micro, 2010)

Near term computing opportunities in building energy efficiency. - Amir Roth (IGCC, 2012)

Flexible register management using reference counting. - Steven J. Battle; Andrew D. Hilton; Mark Hempstead; Amir Roth (HPCA, 2012)