A 1.8V 100mW 12-bits 80Msample/s two-step ADC in 0.18-μm CMOS. - Amir Zjajo; Hendrik van der Ploeg; Maarten Vertregt (ESSCIRC, 2003)

Evaluation of signature-based testing of RF/analog circuits. - Amir Zjajo; José Pineda de Gyvez (ETS, 2005)

Power-scan chain: design for analog testability. - Amir Zjajo; Henk Jan Bergveld; Rodger Schuttert; José Pineda de Gyvez (ITC, 2005)

Structural Fault Modeling and Fault Detection Through Neyman-Pearson Decision Criteria for Analog Integrated Circuits. - Amir Zjajo; José Pineda de Gyvez; Guido Gronthoud (J. Electron. Test., 2006)

Interactive presentation: BIST method for die-level process parameter variation monitoring in analog/mixed-signal integrated circuits. - Amir Zjajo; Manuel J. Barragan Asian; José Pineda de Gyvez (DATE, 2007)

Diagnostic Analysis of Static Errors in Multi-Step Analog to Digital Converters. - Amir Zjajo; José Pineda de Gyvez (DATE, 2008)

Efficient Estimation of Die-Level Process Parameter Variations via the EM-Algorithm. - Amir Zjajo; Shaji Krishnan; José Pineda de Gyvez (DDECS, 2008)

Calibration and Debugging of Multi-step Analog to Digital Converters. - Amir Zjajo; José Pineda de Gyvez (DELTA, 2008)

Diagnostic analysis of bandwidth mismatch in time-interleaved systems. - Amir Zjajo (ICECS, 2008)

Algorithms for ADC Multi-site Test with Digital Input Stimulus. - Xiaoqin Sheng; Hans G. Kerkhoff; Amir Zjajo; Guido Gronthoud (ETS, 2009)

Analog Automatic Test Pattern Generation for Quasi-Static Structural Test. - Amir Zjajo; José Pineda de Gyvez (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Noise analysis of non-linear dynamic integrated circuits. - Amir Zjajo; Qin Tang; Michel Berkelaar; Nick van der Meijs (CICC, 2010)

RDE-based transistor-level gate simulation for statistical static timing analysis. - Qin Tang; Amir Zjajo; Michel Berkelaar; Nick van der Meijs (DAC, 2010)

Digital cartesian feedback linearization of switched mode power amplifiers. - Alejandro Viteri; Amir Zjajo; Thijmen Hamoen; Nick van der Meijs (ICECS, 2010)

A low-power digitally-programmable variable gain amplifier in 65 nm CMOS. - Amir Zjajo; Mingxin Song (ISLPED, 2010)

Transistor-Level Gate Modeling for Nano CMOS Circuit Verification Considering Statistical Process Variations. - Qin Tang; Amir Zjajo; Michel Berkelaar; Nick van der Meijs (PATMOS, 2010)

Statistical Moment Estimation of Delay and Power in Circuit Simulation. - Ashish Nigam; Qin Tang; Amir Zjajo; Michel Berkelaar; Nick van der Meijs (J. Low Power Electron., 2010)

Pseudo circuit model for representing uncertainty in waveforms. - Ashish Nigam; Qin Tang; Amir Zjajo; Michel Berkelaar; Nick van der Meijs (DATE, 2011)

A 1.2v 55mW 12bits self-calibrated dual-residue analog to digital converter in 90 nm CMOs. - Amir Zjajo; José Pineda de Gyvez (ISLPED, 2011)

Stochastic Analysis of Deep-Submicrometer CMOS Process for Reliable Circuits Designs. - Amir Zjajo; Qin Tang; Michel Berkelaar; José Pineda de Gyvez; Alessandro Di Bucchianico; Nick van der Meijs (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Crosstalk-aware statistical interconnect delay calculation. - Qin Tang; Amir Zjajo; Michel Berkelaar; Nick van der Meijs (ASP-DAC, 2012)

Transistor-level gate model based statistical timing analysis considering correlations. - Qin Tang; Amir Zjajo; Michel Berkelaar; Nick van der Meijs (DATE, 2012)

A 11 µW 0°C-160°C temperature sensor in 90 nm CMOS for adaptive thermal monitoring of VLSI circuits. - Amir Zjajo; Nick van der Meijs; René van Leuken 001 (ISCAS, 2012)

Thermal analysis of 3D integrated circuits based on discontinuous Galerkin finite element method. - Amir Zjajo; Nick van der Meijs; Rene van Leuken 001 (ISQED, 2012)

Direct Statistical Simulation of Timing Properties in Sequential Circuits. - Javier Rodríguez; Qin Tang; Amir Zjajo; Michel Berkelaar; Nick van der Meijs (PATMOS, 2012)

ADC Multi-Site Test Based on a Pre-test with Digital Input Stimulus. - Xiaoqin Sheng; Hans G. Kerkhoff; Amir Zjajo; Guido Gronthoud (J. Electron. Test., 2012)

Stimulus generation for RF MEMS switches test application. - Mingxin Song; Jinghua Yin; Zuobao Cao; Tong Wu; Yu Zhao; Zhao Jin; Amir Zjajo (Int. J. Simul. Process. Model., 2012)

Digital Adaptive Calibration of Multi-Step Analog to Digital Converters. - Amir Zjajo; Manuel J. Barragan Asian; José Pineda de Gyvez (J. Low Power Electron., 2012)

Low-Power Die-Level Process Variation and Temperature Monitors for Yield Analysis and Optimization in Deep-Submicron CMOS. - Amir Zjajo; Manuel J. Barragan Asian; José Pineda de Gyvez (IEEE Trans. Instrum. Meas., 2012)

Balanced stochastic truncation of coupled 3D interconnect. - Amir Zjajo; Nick van der Meijs; Rene van Leuken 001 (ICICDT, 2013)

A CMOS 0.23pj Freeze Vernier Time-To-Digital Converter. - Jan A. Angevare; Kristof Blutman; Amir Zjajo; Nick van der Meijs (NORCHIP, 2013)

Adaptive Thermal Monitoring of Deep-Submicron CMOS VLSI Circuits. - Amir Zjajo; Nick van der Meijs; Rene van Leuken 001 (J. Low Power Electron., 2013)

ESL design of customizable real-time neuron networks. - Martijn F. van Eijk; Carlo Galuzzi; Amir Zjajo; Georgios Smaragdos; Christos Strydis; Rene van Leuken 001 (BioCAS, 2014)

A 0.1pJ Freeze Vernier time-to-digital converter in 65nm CMOS. - Kristof Blutman; Jan A. Angevare; Amir Zjajo; Nick van der Meijs (ISCAS, 2014)

Statistical power optimization of deep-submicron digital CMOS circuits based on structured perceptron. - Amir Zjajo; Nick van der Meijs; Rene van Leuken 001 (ISIC, 2014)

Statistical Transistor-Level Timing Analysis Using a Direct Random Differential Equation Solver. - Qin Tang; Javier Rodríguez; Amir Zjajo; Michel Berkelaar; Nick van der Meijs (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Considering Crosstalk Effects in Statistical Timing Analysis. - Qin Tang; Amir Zjajo; Michel Berkelaar; Nick van der Meijs (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

System Level Methodology for Interconnect Aware and Temperature Constrained Power Management of 3-D MP-SOCs. - Sumeet S. Kumar; Arnica Aggarwal; Radhika Sanjeev Jagtap; Amir Zjajo; Rene van Leuken 001 (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Dynamic Thermal Estimation Methodology for High-Performance 3-D MPSoC. - Amir Zjajo; Nick van der Meijs; Rene van Leuken 001 (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Noise Analysis of Programmable Gain Analog to Digital Converter for Integrated Neural Implant Front End. - Amir Zjajo; Carlo Galuzzi; René van Leuken 001 (BIODEVICES, 2015)

Low Power Programmable Gain Analog to Digital Converter for Integrated Neural Implant Front End. - Amir Zjajo; Carlo Galuzzi; Rene van Leuken 001 (BIOSTEC (Selected Papers), 2015)

Iterative learning cascaded multiclass kernel based support vector machine for neural spike data classification. - Amir Zjajo; René van Leuken 001 (CIBCB, 2015)

Physical characterization of steady-state temperature profiles in three-dimensional integrated circuits. - Sumeet S. Kumar; Amir Zjajo; Rene van Leuken 001 (ISCAS, 2015)

Stochastic noise analysis of neural interface front end. - Amir Zjajo; Carlo Galuzzi; Rene van Leuken 001 (ISCAS, 2015)

Sequential power per area optimization of multichannel neural recording interface based on dual quadratic programming. - Amir Zjajo; Carlo Galuzzi; Rene van Leuken 001 (NER, 2015)

Ctherm: An Integrated Framework for Thermal-Functional Co-simulation of Systems-on-Chip. - Sumeet S. Kumar; Amir Zjajo; René van Leuken 001 (PDP, 2015)

Multi-Domain SystemC model of 128-channel time-multiplexed neural interface front-end. - Kiki Wirianto; Amir Zjajo; Carlo Galuzzi; Rene van Leuken 001 (SAMOS, 2015)

A 41 μW real-time adaptive neural spike classifier. - Amir Zjajo; Rene van Leuken 001 (BHI, 2016)

A 2.1 μW/channel current-mode integrated neural recording interface. - Amir Zjajo; Rene van Leuken 001 (BHI, 2016)

A real-time hybrid neuron network for highly parallel cognitive systems. - Gerrit Jan Christiaanse; Amir Zjajo; Carlo Galuzzi; Rene van Leuken 001 (EMBC, 2016)

Multi-chip dataflow architecture for massive scale biophysically accurate neuron simulation. - Jaco Hofmann; Amir Zjajo; Carlo Galuzzi; René van Leuken 001 (EMBC, 2016)

A 2.7μW 10b 640kS/s time-based A/D converter for implantable neural recording interface. - Amir Zjajo; Santosh Astigimath; Rene van Leuken 001 (ISCAS, 2016)

Power-Efficiency of Signal Processing Circuits in Implantable Multichannel Brain-Machine Interface. - Amir Zjajo (J. Low Power Electron., 2016)

Neuromorphic spike data classifier for reconfigurable brain-machine interface. - Amir Zjajo; Sumeet S. Kumar; René van Leuken 001 (NER, 2017)

Energy-efficient neuromorphic receptors for wide-range temporal patterns of post-synaptic responses. - Xuefei You; Amir Zjajo; Sumeet S. Kumar; Rene van Leuken 001 (NORCAS, 2017)

Neuromorphic self-organizing map design for classification of bioelectric-timescale signals. - Johan Mes; Ester Stienstra; Xuefei You; Sumeet S. Kumar; Amir Zjajo; Carlo Galuzzi; Rene van Leuken 001 (SAMOS, 2017)

Digital spiking neuron cells for real-time reconfigurable learning networks. - Haipeng Lin; Amir Zjajo; Rene van Leuken 001 (SoCC, 2017)

Immediate Neighborhood Temperature Adaptive Routing for Dynamically Throttled 3-D Networks-on-Chip. - Sumeet S. Kumar; Amir Zjajo; Rene van Leuken 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Fighting Dark Silicon: Toward Realizing Efficient Thermal-Aware 3-D Stacked Multiprocessors. - Sumeet S. Kumar; Amir Zjajo; René van Leuken 001 (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Energy-efficient multipath ring network for heterogeneous clustered neuronal arrays. - Andrei Ardelean; Amir Zjajo; Sumeet S. Kumar; Rene van Leuken 001 (BHI, 2018)

Uncertainty in Noise-Driven Steady-State Neuromorphic Network for ECG Data Classification. - Amir Zjajo; Johan Mes; Eralp Kolagasioglu; Sumeet S. Kumar; Rene van Leuken 001 (CBMS, 2018)

A Real-Time Reconfigurable Multichip Architecture for Large-Scale Biophysically Accurate Neuron Simulation. - Amir Zjajo; Jaco Hofmann; Gerrit Jan Christiaanse; Martijn F. van Eijk; Georgios Smaragdos; Christos Strydis; Alexander de Graaf; Carlo Galuzzi; Rene van Leuken 001 (IEEE Trans. Biomed. Circuits Syst., 2018)

Towards Computationally-Efficient Cognitive Sensor Systems for Autonomous Vehicles. - Shashanka Marigi Rajanarayana; Sumeet Kumar; Amir Zjajo; René van Leuken 001 (ICCI*CC, 2019)

Neurosynaptic Computational Elements for Adaptive Transient Synchrony: Biophysical Accuracy versus Hardware Complexity. - Amir Zjajo (IWCIA, 2019)

Heterogeneous Activation Function Extraction for Training and Optimization of SNN Systems. - Amir Zjajo; Sumeet S. Kumar; Rene van Leuken 001 (AICAS, 2019)

Towards Robust Inference of Biomedical Signals in Energy-Efficient Neuromorphic Networks. - Amir Zjajo; Sumeet S. Kumar; Rene van Leuken 001 (LifeTech, 2019)

Dynamic Homeostatic Regulation in Energy-Efficient Time-Locked Neuromorphic Systems. - Amir Zjajo (BIBE, 2020)

Integrated System-on-Module for Design-Space Exploration of Spiking Neural Networks. - Moamen El-Masry; Taher Kourany; Rex Kho; Thilo Werner; Amir Zjajo; Robert Weigel (AICAS, 2023)

Toward Efficient System-on-Module for Design-Space Exploration of Analog Spiking Neural Networks. - Moamen El-Masry; Thilo Werner; Amir Zjajo; Robert Weigel (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)