Instruction distribution heuristics for quad-cluster, dynamically-scheduled, superscalar processors. - Amirali Baniasadi; Andreas Moshovos (MICRO, 2000)

Slice-processors: an implementation of operation-based prediction. - Andreas Moshovos; Dionisios N. Pnevmatikatos; Amirali Baniasadi (ICS, 2001)

Instruction flow-based front-end throttling for power-aware high-performance processors. - Amirali Baniasadi; Andreas Moshovos (ISLPED, 2001)

Branch Predictor Prediction: A Power-Aware Branch Predictor for High-Performance Processors. - Amirali Baniasadi; Andreas Moshovos (ICCD, 2002)

Asymmetric-frequency clustering: a power-aware back-end for high-performance processors. - Amirali Baniasadi; Andreas Moshovos (ISLPED, 2002)

Back-End Dynamic Resource Allocation Heuristics for Power-Aware High-Performance Clustered Architectures. - Amirali Baniasadi (DSD, 2003)

Power-Aware Branch Predictor Update for High-Performance Processors. - Amirali Baniasadi (PATMOS, 2003)

SEPAS: a highly accurate energy-efficient branch predictor. - Amirali Baniasadi; Andreas Moshovos (ISLPED, 2004)

Balancing clustering-induced stalls to improve performance in clustered processors. - Amirali Baniasadi (Conf. Computing Frontiers, 2005)

Low-power prediction based data transfer architecture. - Maged Ghoneima; Ehsan Atoofian; Amirali Baniasadi; Yehea I. Ismail (CICC, 2005)

Improving Energy-Efficiency by Bypassing Trivial Computations. - Ehsan Atoofian; Amirali Baniasadi (IPDPS, 2005)

Area-Aware Pipeline Gating for Embedded Processors. - Babak Salamat; Amirali Baniasadi (PATMOS, 2005)

Branchless cycle prediction for embedded processors. - Kaveh Jokar Deris; Amirali Baniasadi (SAC, 2006)

Reducing Execution Unit Leakage Power in Embedded Processors. - Houman Homayoun; Amirali Baniasadi (SAMOS, 2006)

Area-Aware Optimizations for Resource Contrained Branch Predictors Exploited in Embedded Processors. - Babak Salamat; Amirali Baniasadi; Kaveh Jokar Deris (ICSAMOS, 2006)

Low-Power Perceptron Branch Predictor. - Kaveh Aasaraai; Amirali Baniasadi (J. Low Power Electron., 2006)

A Power-Aware Alternative for the Perceptron Branch Predictor. - Kaveh Aasaraai; Amirali Baniasadi (Asia-Pacific Computer Systems Architecture Conference, 2007)

Exploiting Task Temperature Profiling in Temperature-Aware Task Scheduling for Computational Clusters. - Daniel C. Vanderster; Amirali Baniasadi; Nikitas J. Dimopoulos (Asia-Pacific Computer Systems Architecture Conference, 2007)

Computational and storage power optimizations for the O-GEHL branch predictor. - Kaveh Aasaraai; Amirali Baniasadi; Ehsan Atoofian (Conf. Computing Frontiers, 2007)

Speculative supplier identification for reducing power of interconnects in snoopy cache coherence protocols. - Ehsan Atoofian; Amirali Baniasadi; Kaveh Aasaraai (Conf. Computing Frontiers, 2007)

A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors. - Ehsan Atoofian; Amirali Baniasadi (IPDPS, 2007)

Exploiting Speculation Cost Prediction in Power-Aware Applications. - Ehsan Atoofian; Amirali Baniasadi; Kaveh Aasaraai (J. Low Power Electron., 2007)

Speculative trivialization point advancing in high-performance processors. - Ehsan Atoofian; Amirali Baniasadi (J. Syst. Archit., 2007)

Investigating cache energy and latency break-even points in high performance processors. - Kaveh Jokar Deris; Amirali Baniasadi (SIGARCH Comput. Archit. News, 2007)

Adaptive Read Validation in Time-Based Software Transactional Memory. - Ehsan Atoofian; Amirali Baniasadi; Yvonne Coady (Euro-Par Workshops, 2008)

Exploiting program cyclic behavior to reduce memory latency in embedded processors. - Ehsan Atoofian; Amirali Baniasadi (SAC, 2008)

Using supplier locality in power-aware interconnects and caches in chip multiprocessors. - Ehsan Atoofian; Amirali Baniasadi (J. Syst. Archit., 2008)

Application Specific Transistor Sizing for Low Power Full Adders. - Fatemeh Eslami; Amirali Baniasadi; Mostafa Farahani (ASAP, 2009)

Temperature reduction analysis in Sentry Tag cache systems. - Mostafa Farahani; Amirali Baniasadi (MEDEA@PACT, 2009)

Write Invalidation Analysis in Chip Multiprocessors. - Newsha Ardalani; Amirali Baniasadi (PATMOS, 2009)

A New Cell Design Methodology for Balanced XOR-XNOR Circuits for Hybrid-CMOS Logic. - Tooraj Nikoubin; Fatemeh Eslami; Amirali Baniasadi; Keivan Navi (J. Low Power Electron., 2009)

Power-aware scoreboard alternatives for multimedia processors. - Amirali Baniasadi; Babak Salamat; Kaveh Jokar Deris (Microprocess. Microsystems, 2009)

Storage-Aware Value Prediction. - Mohammad Salehi; Amirali Baniasadi (DSD, 2010)

Helia: Heterogeneous Interconnect for Low Resolution Cache Access in snoop-based chip multiprocessors. - Ali Shafiee; Narges Shahidi; Amirali Baniasadi (ICCD, 2010)

Using Partial Tag Comparison in Low-Power Snoop-Based Chip Multiprocessors. - Ali Shafiee; Narges Shahidi; Amirali Baniasadi (ISCA Workshops, 2010)

System-Level Vulnerability Estimation for Data Caches. - Alireza Haghdoost 001; Hossein Asadi 001; Amirali Baniasadi (PRDC, 2010)

Power-aware BTB for modern processors. - Kaveh Jokar Deris; Amirali Baniasadi (Comput. Electr. Eng., 2010)

Instruction and data cache peak temperature reduction using cache access balancing in embedded processors. - Mohsen Taherian; Amirali Baniasadi; Hamid Noori (AICCSA, 2011)

Power and frequency analysis for data and control independence in embedded processors. - Farzad Samie; Amirali Baniasadi (IGCC, 2011)

Using Silent Writes in Low-Power Traffic-Aware ECC. - Mostafa Kishani; Amirali Baniasadi; Hossein Pedram (PATMOS, 2011)

History-aware, resource-based dynamic scheduling for heterogeneous multi-core processors. - A. Zolfaghari Jooya; Amirali Baniasadi; M. Analoui (IET Comput. Digit. Tech., 2011)

Efficient Design Space Exploration of GPGPU Architectures. - Ali Jooya; Amirali Baniasadi; Nikitas J. Dimopoulos (Euro-Par Workshops, 2012)

Dynamic warp resizing: Analysis and benefits in high-performance SIMT. - Ahmad Lashgar; Amirali Baniasadi; Ahmad Khonsari (ICCD, 2012)

Performance and Power Solutions for Caches Using 8T SRAM Cells. - Mostafa Farahani; Amirali Baniasadi (MICRO Workshops, 2012)

Investigating Warp Size Impact in GPUs - Ahmad Lashgar; Amirali Baniasadi; Ahmad Khonsari (CoRR, 2012)

Dynamic Warp Resizing in High-Performance SIMT - Ahmad Lashgar; Amirali Baniasadi; Ahmad Khonsari (CoRR, 2012)

Leakage-Aware Speculative Branch Target Buffer. - Saman Khoshbakht; Amirali Baniasadi (J. Low Power Electron., 2012)

Heterogeneous Interconnect for Low-Power Snoop-Based Chip Multiprocessors. - Narges Shahidi; Ali Shafiee; Amirali Baniasadi (J. Low Power Electron., 2012)

Inter-warp Instruction Temporal Locality in Deep-Multithreaded GPUs. - Ahmad Lashgar; Amirali Baniasadi; Ahmad Khonsari (ARCS, 2013)

FARHAD: A Fault-Tolerant Power-Aware Hybrid Adder for add intensive applications. - Mohammad Hossein Hajkazemi; Amirali Baniasadi; Hossein Asadi 001 (ASAP, 2013)

Warp size impact in GPUs: large or small? - Ahmad Lashgar; Amirali Baniasadi; Ahmad Khonsari (GPGPU@ASPLOS, 2013)

Using synchronization stalls in power-aware accelerators. - Ali Jooya; Amirali Baniasadi (DATE, 2013)

Application Specific Low Leakage data Cache for embedded processors. - Mostafa Farahani; Fatemeh Eslami; Amirali Baniasadi (IGCC, 2013)

Towards green GPUs: Warp size impact analysis. - Ahmad Lashgar; Amirali Baniasadi; Ahmad Khonsari (IGCC, 2013)

ARV-ALA: Improving performance of software transactional memory through adaptive read and write policies. - Ehsan Atoofian; Amirali Baniasadi; Yvonne Coady (Sci. Comput. Program., 2013)

A case against small data types in GPGPUs. - Ahmad Lashgar; Amirali Baniasadi (ASAP, 2014)

IPMACC: Open Source OpenACC to CUDA/OpenCL Translator. - Ahmad Lashgar; Alireza Majidi; Amirali Baniasadi (CoRR, 2014)

Column selection solutions for L1 data caches implemented using eight-transistor cells. - Mostafa Farahani; Amirali Baniasadi (IET Comput. Digit. Tech., 2014)

An Alternative Hybrid Power-Aware Adder for High-Performance Processors. - Mohammad Hossein Hajkazemi; Amirali Baniasadi (J. Low Power Electron., 2014)

CEDAR: Modeling impact of component error derating and read frequency on system-level vulnerability in high-performance processors. - Hossein Asadi 001; Alireza Haghdoost 001; Morteza Ramezani; Nima Elyasi; Amirali Baniasadi (Microelectron. Reliab., 2014)

HARP: Harnessing inactive threads in many-core processors. - Ahmad Lashgar; Ahmad Khonsari; Amirali Baniasadi (ACM Trans. Embed. Comput. Syst., 2014)

Rethinking Prefetching in GPGPUs: Exploiting Unique Opportunities. - Ahmad Lashgar; Amirali Baniasadi (HPCC/CSS/ICESS, 2015)

GPU design space exploration: NN-based models. - Ali Jooya; Nikitas Dimopoulos; Amirali Baniasadi (PACRIM, 2015)

A Case Study in Reverse Engineering GPGPUs: Outstanding Memory Handling Resources. - Ahmad Lashgar; Ebad Salehi; Amirali Baniasadi (SIGARCH Comput. Archit. News, 2015)

Power-efficient prefetching on GPGPUs. - Hajar Falahati; Shaahin Hessabi; Mania Abdi; Amirali Baniasadi (J. Supercomput., 2015)

Employing Compression Solutions under OpenACC. - Ebad Salehi; Ahmad Lashgar; Amirali Baniasadi (IPDPS Workshops, 2016)

OpenACC Cache Directive: Opportunities and Optimizations. - Ahmad Lashgar; Amirali Baniasadi (WACCPD@SC, 2016)

Employing Software-Managed Caches in OpenACC: Opportunities and Benefits. - Ahmad Lashgar; Amirali Baniasadi (ACM Trans. Model. Perform. Evaluation Comput. Syst., 2016)

Optimum Power-Performance GPU Configuration Prediction Based on Code Attributes. - Ali Jooya; Nikitas Dimopoulos; Amirali Baniasadi (HPCS, 2017)

Loop Perforation in OpenACC. - Ahmad Lashgar; Ehsan Atoofian; Amirali Baniasadi (ISPA/IUCC/BDCloud/SocialCom/SustainCom, 2018)

TELEPORT: Hardware/software alternative to CUDA shared memory programming. - Ahmad Lashgar; Ehsan Atoofian; Amirali Baniasadi (Microprocess. Microsystems, 2018)

Scale Invariant Super-Resolutions Methods with Application to InSAR Images. - Khaled A. Helal; Bardia Barabadi; Amirali Baniasadi; Nikitas Dimopoulos (APCCAS, 2019)

Dual-Stage Phase Unwrapping. - Bardia Barabadi; Matthew Gara; Ali Jooya; Amirali Baniasadi; Nikitas Dimopoulos (NORCAS, 2019)

Efficient implementation of OpenACC cache directive on NVIDIA GPUs. - Ahmad Lashgar; Amirali Baniasadi (Int. J. High Perform. Comput. Netw., 2019)

Multiobjective GPU design space exploration optimization. - Ali Jooya; Nikitas Dimopoulos; Amirali Baniasadi (Microprocess. Microsystems, 2019)

Quick-CapsNet (QCN): A Fast Alternative to Capsule Networks. - Pouya Shiri; Ramin Sharifi; Amirali Baniasadi (AICCSA, 2020)

Zero-skipping in CapsNet. Is it worth it? - Ramin Sharifi; Pouya Shiri; Amirali Baniasadi (CATA, 2020)

Improving InSAR Image Quality and Co-Registration through CNN-Based Super-Resolution. - Khaled A. Helal Kelany; Amirali Baniasadi; Nikitas Dimopoulos; Matthew Gara (ISCAS, 2020)

Quantum Annealing Approaches to the Phase-Unwrapping Problem in Synthetic-Aperture Radar Imaging. - Khaled A. Helal Kelany; Nikitas Dimopoulos; Clemens P. J. Adolphs; Bardia Barabadi; Amirali Baniasadi (QCE, 2020)

Energy Efficient On-Demand Dynamic Branch Prediction Models. - Milad Mohammadi; Song Han 003; Ehsan Atoofian; Amirali Baniasadi; Tor M. Aamodt; William J. Dally (IEEE Trans. Computers, 2020)

Convolutional Fully-Connected Capsule Network (CFC-CapsNet). - Pouya Shiri; Amirali Baniasadi (DASIP, 2021)

PrunedCaps: A Case For Primary Capsules Discrimination. - Ramin Sharifi; Pouya Shiri; Amirali Baniasadi (ICMLA, 2021)

LE-CapsNet: A Light and Enhanced Capsule Network. - Pouya Shiri; Amirali Baniasadi (ICMLA, 2021)

An Enhanced (Margin-based) Quantum Annealing Approach to Phase-Unwrap SAR Images. - Khaled A. Helal Kelany; Nikitas Dimopoulos; Clemens P. J. Adolphs; Amirali Baniasadi (CCECE, 2022)

DL-CapsNet: A Deep and Light Capsule Network. - Pouya Shiri; Amirali Baniasadi (DASIP, 2022)

Turn-aware Application Mapping using Reinforcement Learning in Power Gating-enabled Network on Chip. - Mohammadmehdi Shammasi; Mohammad Baharloo; Meisam Abdollahi; Amirali Baniasadi (MCSoC, 2022)

Convolutional Fully-Connected Capsule Network (CFC-CapsNet): A Novel and Fast Capsule Network. - Pouya Shiri; Amirali Baniasadi (J. Signal Process. Syst., 2022)

Blockchain-Based, Privacy-Preserving, First Price Sealed Bid Auction (FPSBA) Verifiable by Participants. - Ehsan Ghasaei; Amirali Baniasadi (BRAINS, 2023)

Dark Web Traffic Detection Using Supervised Machine Learning. - Sahra Zangeneh Nezhad; Amirali Baniasadi (CCECE, 2023)

Detection of COVID-19 Cases from X-ray Images Using Capsule-based Network. - Donya Ashtiani Haghighi; Amirali Baniasadi (MCNA, 2023)

IODnet: Indoor/Outdoor Telecommunication Signal Detection through Deep Neural Network. - Meisam Abdollahi; Sepideh Mashhadi; Ramin Sabzalizadeh; Alireza Mirzaei; Mohammad Elahi; Mohammad Baharloo; Amirali Baniasadi (MCSoC, 2023)

EFL-Net: An Efficient Lightweight Neural Network Architecture for Retinal Vessel Segmentation. - Nasrin Akbari; Amirali Baniasadi (VISIGRAPP (4: VISAPP), 2023)

DeepCaps+: A Light Variant of DeepCaps. - Pouya Shiri; Amirali Baniasadi (VISIGRAPP (5: VISAPP), 2023)

Automatic Modulation Classification for NLOS 5G Signals with Deep Learning Approaches. - Meisam Abdollahi; Ramin Sabzalizadeh; Samaneh Javadinia; Sepideh Mashhadi; Sara Sanati Mehrizi; Amirali Baniasadi (WINCOM, 2023)

DSP: A Deep Neural Network Approach for Serving Cell Positioning in Mobile Networks. - Sepideh Mashhadi; Abolfazl Diyanat; Meisam Abdollahi; Amirali Baniasadi (WINCOM, 2023)

PDR-CapsNet: an Energy-Efficient Parallel Approach to Dynamic Routing in Capsule Networks. - Samaneh Javadinia; Amirali Baniasadi (CoRR, 2023)

System-level reliability assessment of optical network on chip. - Mohammad Baharloo; Meisam Abdollahi; Amirali Baniasadi (Microprocess. Microsystems, 2023)

Thermo-Attack Resiliency: Addressing a New Vulnerability in Opto-Electrical Network-on-Chips. - Mahdi Hasanzadeh; Meisam Abdollahi; Amirali Baniasadi; Ahmad Patooghy (ISQED, 2024)

A Review on Sound Source Localization in Robotics: Focusing on Deep Learning Methods. - Reza Jalayer; Masoud Jalayer; Amirali Baniasadi (CoRR, 2025)