Modeling of FPGA Local/Global Interconnect Resources and Derivation of Minimal Test Configurations. - Xiaoling Sun; Amirhossein Alimohammad 001; Pieter M. Trouborst (DFT, 2002)

A Reconfigurable SOS-based Rayleigh Fading Channel Simulator. - Amirhossein Alimohammad 001; Bruce F. Cockburn (SiPS, 2006)

An Efficient Parallel Architecture for Implementing LST Decoding in MIMO Systems. - Amirhossein Alimohammad 001; Bruce F. Cockburn (IEEE Trans. Signal Process., 2006)

A Compact Fading Channel Simulator Using Timing-Driven Resource Sharing. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn; Christian Schlegel (ASAP, 2007)

A Flexible Filter Processor for Fading Channel Simulation. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn; Christian Schlegel (FCCM, 2007)

Compound Uniform Random Number Generators with On-Chhip Correlation and Distribution Measurements. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn; Christian Schlegel (FPT, 2007)

An Improved SOS-Based Fading Channel Emulator. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn; Christian Schlegel (VTC Fall, 2007)

A Novel Technique for Efficient Hardware Simulation of Spatiotemporally Correlated MIMO Fading Channels. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn; Christian Schlegel (ICC, 2008)

On the efficiency and accuracy of hybrid pseudo-random number generators for FPGA-based simulations. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn; Christian Schlegel (IPDPS, 2008)

A single-FPGA multipath MIMO fading channel simulator. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn; Christian Schlegel (ISCAS, 2008)

A 600-Mb/s encoder and decoder for low-density parity-check convolutional codes. - Tyler L. Brandon; John C. Koob; Leendert van den Berg; Zhengang Chen; Amirhossein Alimohammad 001; Ramkrishna Swamy; Jason Klaus; Stephen Bates; Vincent C. Gaudet; Bruce F. Cockburn; Duncan G. Elliott (ISCAS, 2008)

Hardware-based Error Rate Testing of Digital Baseband Communication Systems. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn (ITC, 2008)

An Accurate and Compact Rayleigh and Rician Fading Channel Simulator. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn; Christian Schlegel (VTC Spring, 2008)

A Compact Single-FPGA Fading-Channel Simulator. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn; Christian Schlegel (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A Compact and Accurate Gaussian Variate Generator. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn; Christian Schlegel (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Modeling and Hardware Implementation Aspects of Fading Channel Simulators. - Amirhossein Alimohammad 001; Bruce F. Cockburn (IEEE Trans. Veh. Technol., 2008)

FPGA-based accelerator for the verification of leading-edge wireless systems. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn (DAC, 2009)

A flexible layered architecture for accurate digital baseband algorithm development and verification. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn (DATE, 2009)

A Single FPGA Filter-Based Multipath Fading Emulator. - Saeed Fouladi Fard; Amirhossein Alimohammad 001; Bruce F. Cockburn; Christian Schlegel (GLOBECOM, 2009)

A versatile fading simulator for on-chip verification of MIMO communication systems. - Saeed Fouladi Fard; Amirhossein Alimohammad 001; Bruce F. Cockburn; Christian Schlegel (SoCC, 2009)

High path-count multirate Rayleigh fading channel simulator with time-multiplexed datapath. - Saeed Fouladi Fard; Amirhossein Alimohammad 001; Bruce F. Cockburn; Christian Schlegel (SoCC, 2009)

Compact Rayleigh and Rician fading simulator based on random walk processes. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn; Christian Schlegel (IET Commun., 2009)

A Compact 1.1-Gb/s Encoder and a Memory-Based 600-Mb/s Decoder for LDPC Convolutional Codes. - Tyler L. Brandon; John C. Koob; Leendert van den Berg; Zhengang Chen; Amirhossein Alimohammad 001; Ramkrishna Swamy; Jason Klaus; Stephen Bates; Vincent C. Gaudet; Bruce F. Cockburn; Duncan G. Elliott (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A Unified Architecture for the Accurate and High-Throughput Implementation of Six Key Elementary Functions. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn (IEEE Trans. Computers, 2010)

An FPGA-Based Simulator for High Path Count Rayleigh and Rician Fading. - Saeed Fouladi Fard; Amirhossein Alimohammad 001; Bruce F. Cockburn (IEEE Trans. Veh. Technol., 2010)

Accurate multiple-input multiple-output fading channel simulator using a compact and highthroughput reconfigurable architecture. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn (IET Commun., 2011)

Single-field programmable gate array simulator for geometric multiple-input multiple-output fading channel models. - Saeed Fouladi Fard; Amirhossein Alimohammad 001; Bruce F. Cockburn (IET Commun., 2011)

Hardware Implementation of Rayleigh and Ricean Variate Generators. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Accurate simulation of non-isotropic fading channels with arbitrary temporal correlation. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn (IET Commun., 2012)

Layered space-time multiple-input multiple-output detector with parameterisable performance. - Amirhossein Alimohammad 001; Santosh V. Nagaraj; Saeed Fouladi Fard; Bruce F. Cockburn (IET Commun., 2012)

Hardware Implementation of Nakagami and Weibull Variate Generators. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Reconfigurable performance measurement system-on-a-chip for baseband wireless algorithm design and verification. - Amirhossein Alimohammad 001; Saeed Fouladi Fard; Bruce F. Cockburn (IEEE Wirel. Commun., 2012)

Soft-decision decoding of convolutional codes with square-law detectors. - Santosh V. Nagaraj; Amirhossein Alimohammad 001 (IET Commun., 2013)

FPGA Implementation of Isotropic and Nonisotropic Fading Channels. - Amirhossein Alimohammad 001; Saeed Fouladi Fard (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

A Compact Architecture for Simulation of Spatio-Temporally Correlated MIMO Fading Channels. - Amirhossein Alimohammad 001; Saeed Fouladi Fard (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

FPGA-Based Bit Error Rate Performance Measurement of Wireless Systems. - Amirhossein Alimohammad 001; Saeed Fouladi Fard (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Two-dimensional sorting algorithm for high-throughput K-best MIMO detection. - Wen Fan; Amirhossein Alimohammad 001 (IET Commun., 2017)

Givens rotation-based QR decomposition for MIMO systems. - Wen Fan; Amirhossein Alimohammad 001 (IET Commun., 2017)

Design and Implementation of a Digital Secure Code-Shifted Reference UWB Transmitter and Receiver. - Andrew Hennessy; Amirhossein Alimohammad 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

High-throughput and compact FFT architectures using the Good-Thomas and Winograd algorithms. - Nikhilesh Bhagat; Daniel Valencia; Amirhossein Alimohammad 001; Fred Harris 001 (IET Commun., 2018)

Compact digital implementation of a non-coherent IR-UWB transmitter and receiver. - Andrew Hennessy; Amirhossein Alimohammad 001 (IET Commun., 2018)

High-throughput and compact reconfigurable architectures for recursive filters. - Vaishali Shinde; Ganesh Jai Kumar; Daniel Valencia; Amirhossein Alimohammad 001 (IET Commun., 2018)

Parallelized QR decomposition using GPUs. - Ian Schofield; Amirhossein Alimohammad 001 (CCECE, 2019)

Parallel GPU-Accelerated Spike Sorting. - Ian Schofield; Amirhossein Alimohammad 001 (CCECE, 2019)

A Reconfigurable Hardware Architecture for Principal Component Analysis. - Uday A. Korat; Amirhossein Alimohammad 001 (Circuits Syst. Signal Process., 2019)

Efficient Design and Implementation of Energy Detection-Based Spectrum Sensing. - Pratik V. Yadav; Amirhossein Alimohammad 001; Fred Harris 001 (Circuits Syst. Signal Process., 2019)

Compact and high-throughput parameterisable architectures for memory-based FFT algorithms. - Daniel Valencia; Amirhossein Alimohammad 001 (IET Circuits Devices Syst., 2019)

An Efficient Hardware Architecture for Template Matching-Based Spike Sorting. - Daniel Valencia; Amirhossein Alimohammad 001 (IEEE Trans. Biomed. Circuits Syst., 2019)

A Real-Time Spike Sorting System Using Parallel OSort Clustering. - Daniel Valencia; Amirhossein Alimohammad 001 (IEEE Trans. Biomed. Circuits Syst., 2019)

Frameworks for Efficient Brain-Computer Interfacing. - Daniel Valencia; Jameson Thies; Amirhossein Alimohammad 001 (IEEE Trans. Biomed. Circuits Syst., 2019)

An Artificial Neural Network Processor With a Custom Instruction Set Architecture for Embedded Applications. - Daniel Valencia; Saeed Fouladi Fard; Amirhossein Alimohammad 001 (IEEE Trans. Circuits Syst., 2020)

A generalized hardware architecture for real-time spiking neural networks. - Daniel Valencia; Amirhossein Alimohammad 001 (Neural Comput. Appl., 2023)

Efficient in Vivo Neural Signal Compression Using an Autoencoder-Based Neural Network. - Daniel Valencia; Patrick P. Mercier; Amir Alimohammad 001 (IEEE Trans. Biomed. Circuits Syst., 2024)

An Efficient Brain-Switch for Asynchronous Brain-Computer Interfaces. - Daniel Valencia; Patrick P. Mercier; Amir Alimohammad 001 (IEEE Trans. Biomed. Circuits Syst., 2025)