Amirhossein Alimohammad

According to our database1, Amirhossein Alimohammad authored at least 49 papers between 2006 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2019
Frameworks for Efficient Brain-Computer Interfacing.
IEEE Trans. Biomed. Circuits Syst., 2019

A Real-Time Spike Sorting System Using Parallel OSort Clustering.
IEEE Trans. Biomed. Circuits Syst., 2019

An Efficient Hardware Architecture for Template Matching-Based Spike Sorting.
IEEE Trans. Biomed. Circuits Syst., 2019

Compact and high-throughput parameterisable architectures for memory-based FFT algorithms.
IET Circuits Devices Syst., 2019

Efficient Design and Implementation of Energy Detection-Based Spectrum Sensing.
Circuits Syst. Signal Process., 2019

A Reconfigurable Hardware Architecture for Principal Component Analysis.
Circuits Syst. Signal Process., 2019

Parallel GPU-Accelerated Spike Sorting.
Proceedings of the 2019 IEEE Canadian Conference of Electrical and Computer Engineering, 2019

Parallelized QR decomposition using GPUs.
Proceedings of the 2019 IEEE Canadian Conference of Electrical and Computer Engineering, 2019

2018
High-throughput and compact reconfigurable architectures for recursive filters.
IET Commun., 2018

Compact digital implementation of a non-coherent IR-UWB transmitter and receiver.
IET Commun., 2018

High-throughput and compact FFT architectures using the Good-Thomas and Winograd algorithms.
IET Commun., 2018

2017
Design and Implementation of a Digital Secure Code-Shifted Reference UWB Transmitter and Receiver.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Givens rotation-based QR decomposition for MIMO systems.
IET Commun., 2017

Two-dimensional sorting algorithm for high-throughput K-best MIMO detection.
IET Commun., 2017

2014
FPGA-Based Bit Error Rate Performance Measurement of Wireless Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2014

A Compact Architecture for Simulation of Spatio-Temporally Correlated MIMO Fading Channels.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2013
FPGA Implementation of Isotropic and Nonisotropic Fading Channels.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

Soft-decision decoding of convolutional codes with square-law detectors.
IET Commun., 2013

2012
Reconfigurable performance measurement system-on-a-chip for baseband wireless algorithm design and verification.
IEEE Wirel. Commun., 2012

Hardware Implementation of Nakagami and Weibull Variate Generators.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Layered space-time multiple-input multiple-output detector with parameterisable performance.
IET Commun., 2012

Accurate simulation of non-isotropic fading channels with arbitrary temporal correlation.
IET Commun., 2012

2011
Hardware Implementation of Rayleigh and Ricean Variate Generators.
IEEE Trans. Very Large Scale Integr. Syst., 2011

Single-field programmable gate array simulator for geometric multiple-input multiple-output fading channel models.
IET Commun., 2011

Accurate multiple-input multiple-output fading channel simulator using a compact and highthroughput reconfigurable architecture.
IET Commun., 2011

2010
An FPGA-Based Simulator for High Path Count Rayleigh and Rician Fading.
IEEE Trans. Veh. Technol., 2010

A Unified Architecture for the Accurate and High-Throughput Implementation of Six Key Elementary Functions.
IEEE Trans. Computers, 2010

2009
A Compact 1.1-Gb/s Encoder and a Memory-Based 600-Mb/s Decoder for LDPC Convolutional Codes.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Compact Rayleigh and Rician fading simulator based on random walk processes.
IET Commun., 2009

High path-count multirate Rayleigh fading channel simulator with time-multiplexed datapath.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

A versatile fading simulator for on-chip verification of MIMO communication systems.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

A Single FPGA Filter-Based Multipath Fading Emulator.
Proceedings of the Global Communications Conference, 2009. GLOBECOM 2009, Honolulu, Hawaii, USA, 30 November, 2009

A flexible layered architecture for accurate digital baseband algorithm development and verification.
Proceedings of the Design, Automation and Test in Europe, 2009

FPGA-based accelerator for the verification of leading-edge wireless systems.
Proceedings of the 46th Design Automation Conference, 2009

2008
Modeling and Hardware Implementation Aspects of Fading Channel Simulators.
IEEE Trans. Veh. Technol., 2008

A Compact and Accurate Gaussian Variate Generator.
IEEE Trans. Very Large Scale Integr. Syst., 2008

A Compact Single-FPGA Fading-Channel Simulator.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

An Accurate and Compact Rayleigh and Rician Fading Channel Simulator.
Proceedings of the 67th IEEE Vehicular Technology Conference, 2008

Hardware-based Error Rate Testing of Digital Baseband Communication Systems.
Proceedings of the 2008 IEEE International Test Conference, 2008

A 600-Mb/s encoder and decoder for low-density parity-check convolutional codes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A single-FPGA multipath MIMO fading channel simulator.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

On the efficiency and accuracy of hybrid pseudo-random number generators for FPGA-based simulations.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

A Novel Technique for Efficient Hardware Simulation of Spatiotemporally Correlated MIMO Fading Channels.
Proceedings of IEEE International Conference on Communications, 2008

2007
An Improved SOS-Based Fading Channel Emulator.
Proceedings of the 66th IEEE Vehicular Technology Conference, 2007

Compound Uniform Random Number Generators with On-Chhip Correlation and Distribution Measurements.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

A Flexible Filter Processor for Fading Channel Simulation.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

A Compact Fading Channel Simulator Using Timing-Driven Resource Sharing.
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

2006
An Efficient Parallel Architecture for Implementing LST Decoding in MIMO Systems.
IEEE Trans. Signal Process., 2006

A Reconfigurable SOS-based Rayleigh Fading Channel Simulator.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006


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