Search Space Reduction for Efficient Quantum Compilation. - Amisha Srivastava; Chao Lu; Navnil Choudhury; Ayush Arunachalam; Kanad Basu (ACM Great Lakes Symposium on VLSI, 2023)

Application Profiling Using Register-Instruction Hardware Performance Counters. - Anand Menon; Amisha Srivastava; Shamik Kundu; Kanad Basu (ISVLSI, 2023)

Unlocking Hardware Security Assurance: The Potential of LLMs. - Xingyu Meng; Amisha Srivastava; Ayush Arunachalam; Avik Ray; Pedro Henrique Silva; Rafail Psiakis; Yiorgos Makris; Kanad Basu (CoRR, 2023)

NSPG: Natural language Processing-based Security Property Generator for Hardware Security Assurance. - Xingyu Meng; Amisha Srivastava; Ayush Arunachalam; Avik Ray; Pedro Henrique Silva; Rafail Psiakis; Yiorgos Makris; Kanad Basu (DAC, 2024)

Assert-O: Context-based Assertion Optimization using LLMs. - Samit Shahnawaz Miftah; Amisha Srivastava; Hyunmin Kim; Kanad Basu (ACM Great Lakes Symposium on VLSI, 2024)

Yoga Pose Detection with Deep Learning and Computer Vision. - Amisha Srivastava; K. Gayathri; Senthil Kumar Thangavel; Pullela Meghana; S. Vishvajit; B. Senthil Kumar; K. Somasundaram (ICCCNT, 2024)

Hardware-based Detection of Malicious Firmware Modification in Microgrids. - Amisha Srivastava; Sneha Thakur; Abraham Peedikayil Kuruvila; Poras T. Balsara; Kanad Basu (VLSID, 2024)

SCAR: Power Side-Channel Analysis at RTL Level. - Amisha Srivastava; Sanjay Das; Navnil Choudhury; Rafail Psiakis; Pedro Henrique Silva; Debjit Pal; Kanad Basu (IEEE Trans. Very Large Scale Integr. Syst., 2024)

OpenAssert: Towards Secure Assertion Generation using Large Language Models. - Anand Menon; Samit Shahnawaz Miftah; Amisha Srivastava; Shamik Kundu; Shovik Kundu; Arnab Raha; Suvadeep Banerjee; Deepak Mathaikutty; Kanad Basu (VTS, 2025)

Enhancing Large Language Models for Hardware Verification: A Novel SystemVerilog Assertion Dataset. - Anand Menon; Samit S. Miftah; Shamik Kundu; Souvik Kundu 009; Amisha Srivastava; Arnab Raha; Gabriel Theodor Sonnenschein; Suvadeep Banerjee; Deepak Mathaikutty; Kanad Basu (CoRR, 2025)

PoSyn: Secure Power Side-Channel Aware Synthesis. - Amisha Srivastava; Samit Shahnawaz Miftah; Hyunmin Kim; Debjit Pal; Kanad Basu (CoRR, 2025)