Designing energy efficient and hysteresis free negative capacitance FinFET with negative DIBL and 3.5X ION using compact modeling approach. - Girish Pahwa; Tapas Dutta; Amit Agarwal 007; Yogesh Singh Chauhan (ESSCIRC, 2016)

Analysis of Quantum Capacitance Effect in Ultra-Thin-Body III-V Transistor. - Chandan Yadav; Amit Agarwal 007; Yogesh Singh Chauhan (VLSID, 2016)

Enhancing the Capabilities of Quantum Transport Simulations Utilizing Machine Learning Strategies. - Ateeb Naseer; Yawar Hayat Zarkob; Musaib Rafiq; Mohammad Sajid Nazir; Owais Ahmad; Amit Agarwal 007; Somnath Bhowmick; Yogesh Singh Chauhan (MLCAD, 2024)