Burn-in reduction using principal component analysis. - Amit Nahar; W. Robert Daasch; Suresh Subramaniam (ITC, 2005)

Quality improvement and cost reduction using statistical outlier methods. - Amit Nahar; Kenneth M. Butler; John M. Carulli Jr.; Charles Weinberger (ICCD, 2009)

Multidimensional Test Escape Rate Modeling. - Kenneth M. Butler; John M. Carulli Jr.; Jayashree Saxena; Amit Nahar; W. Robert Daasch (IEEE Des. Test Comput., 2009)

Statistics in Semiconductor Test: Going beyond Yield. - W. Robert Daasch; C. Glenn Shirley; Amit Nahar (IEEE Des. Test Comput., 2009)

Adapting to adaptive testing. - Erik Jan Marinissen; Adit D. Singh; Dan Glotter; Marco Esposito; John M. Carulli Jr.; Amit Nahar; Kenneth M. Butler; Davide Appello; Chris Portelli (DATE, 2010)

Die-level adaptive test: Real-time test reordering and elimination. - Kapil R. Gotkhindikar; W. Robert Daasch; Kenneth M. Butler; John M. Carulli Jr.; Amit Nahar (ITC, 2011)

Predicting die-level process variations from wafer test data for analog devices: A feasibility study. - Shyam Kumar Devarakond; Jennifer McCoy; Amit Nahar; John M. Carulli Jr.; Soumendu Bhattacharya; Abhijit Chatterjee (LATW, 2013)

IC laser trimming speed-up through wafer-level spatial correlation modeling. - Constantinos Xanthopoulos; Ke Huang 001; Abbas Poonawala; Amit Nahar; Bob Orr; John M. Carulli Jr.; Yiorgos Makris (ITC, 2014)

Yield Forecasting in Fab-to-Fab Production Migration Based on Bayesian Model Fusion. - Ali Ahmadi; Haralampos-G. D. Stratigopoulos; Amit Nahar; Bob Orr; Michael Pas; Yiorgos Makris (ICCAD, 2015)

Yield prognosis for fab-to-fab product migration. - Ali Ahmadi; Ke Huang 001; Amit Nahar; Bob Orr; Michael Pas; John M. Carulli; Yiorgos Makris (VTS, 2015)

A machine learning approach to fab-of-origin attestation. - Ali Ahmadi; Mohammad-Mahdi Bidmeshki; Amit Nahar; Bob Orr; Michael Pas; Yiorgos Makris (ICCAD, 2016)

Harnessing fabrication process signature for predicting yield across designs. - Ali Ahmadi; Haralampos-G. D. Stratigopoulos; Amit Nahar; Bob Orr; Michael Pas; Yiorgos Makris (ISCAS, 2016)

Harnessing process variations for optimizing wafer-level probe-test flow. - Ali Ahmadi; Constantinos Xanthopoulos; Amit Nahar; Bob Orr; Michael Pas; Yiorgos Makris (ITC, 2016)

What we know after twelve years developing and deploying test data analytics solutions. - Kenneth M. Butler; Amit Nahar; W. Robert Daasch (ITC, 2016)

Statistical outlier screening as a test solution health monitor. - David Shaw; Dirk Hoops; Kenneth M. Butler; Amit Nahar (ITC, 2016)

Wafer-level process variation-driven probe-test flow selection for test cost reduction in analog/RF ICs. - Ali Ahmadi; Amit Nahar; Bob Orr; Michael Pas; Yiorgos Makris (VTS, 2016)

Wafer-level adaptive trim seed forecasting based on E-tests. - Constantinos Xanthopoulos; Ali Ahmadi; Sirish Boddikurapati; Amit Nahar; Bob Orr; Yiorgos Makris (ISCAS, 2017)

Yield Forecasting Across Semiconductor Fabrication Plants and Design Generations. - Ali Ahmadi; Haralampos-G. D. Stratigopoulos; Ke Huang 001; Amit Nahar; Bob Orr; Michael Pas; John M. Carulli; Yiorgos Makris (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Special session on machine learning: How will machine learning transform test? - Yiorgos Makris; Amit Nahar; Haralampos-G. D. Stratigopoulos; Marc Hutner (VTS, 2018)

Wafer-Level Adaptive Vmin Calibration Seed Forecasting. - Constantinos Xanthopoulos; Deepika Neethirajan; Sirish Boddikurapati; Amit Nahar; Yiorgos Makris (DATE, 2019)

Machine Learning-Based Overkill Reduction through Inter-Test Correlation. - Deepika Neethirajan; V. A. Niranjan; Richard Willis; Amit Nahar; D. Webster; Yiorgos Makris (VTS, 2022)

Machine Learning-Based Adaptive Outlier Detection for Underkill Reduction in Analog/RF IC Testing. - V. A. Niranjan; Deepika Neethirajan; Constantinos Xanthopoulos; D. Webster; Amit Nahar; Yiorgos Makris (VTS, 2023)