Experience with testing and rigorous program analysis for qualification of RTOS. - Amol Wakankar; Arindam Khan 002; G. Aravamuthan; A. K. Bhattacharjee (ISEC, 2013)

Formalizing Timing Diagram Requirements in Discrete Duration Calculus. - Raj Mohan Matteplackel; Paritosh K. Pandya; Amol Wakankar (SEFM, 2017)

Formalizing Timing Diagram Requirements in Discrete Duration Calulus. - Raj Mohan Matteplackel; Paritosh K. Pandya; Amol Wakankar (CoRR, 2017)

DCSYNTH: Guided Reactive Synthesis with Soft Requirements for Robust Controller and Shield Synthesis. - Amol Wakankar; Paritosh K. Pandya; Raj Mohan Matteplackel (CoRR, 2017)

Logical specification and uniform synthesis of robust controllers. - Paritosh K. Pandya; Amol Wakankar (MEMOCODE, 2019)

DCSynth: Guided Reactive Synthesis with Soft Requirements. - Amol Wakankar; Paritosh K. Pandya; Raj Mohan Matteplackel (VSTTE, 2019)

DCSYNTH: A Tool for Guided Reactive Synthesis with Soft Requirements. - Amol Wakankar; Paritosh K. Pandya; Raj Mohan Matteplackel (CoRR, 2019)

Specification and Reactive Synthesis of Robust Controllers. - Paritosh K. Pandya; Amol Wakankar (CoRR, 2019)

Specification and Optimal Reactive Synthesis of Run-time Enforcement Shields. - Paritosh K. Pandya; Amol Wakankar (GandALF, 2019)

Development of Safety-Critical Systems - Architecture and Software - Gopinath Karmakar; Amol Wakankar; Ashutosh Kabra; Paritosh K. Pandya (Springer, 2023)