On-chip I-V variability and random telegraph noise characterization in 28 nm CMOS. - Amy Whitcombe; Scott Taylor; Martin Denham; Vladimir M. Milovanovic; Borivoje Nikolic (ESSDERC, 2016)

Design of Energy- and Cost-Efficient Massive MIMO Arrays. - Antonio Puglielli; Andrew Townley; Greg LaCaille; Vladimir M. Milovanovic; Pengpeng Lu; Konstantin Trotskovsky; Amy Whitcombe; Nathan Narevsky; Gregory Wright; Thomas A. Courtade; Elad Alon; Borivoje Nikolic; et al. (Proc. IEEE, 2016)

A Dual-Mode Configurable RF-to-Digital Receiver in 16NM FinFET. - Amy Whitcombe; Borivoje Nikolic; Farhana Sheikh; Erkan Alpman; Ashoke Ravi (VLSI Circuits, 2018)

A Generated 7GS/s 8b Time-Interleaved SAR ADC with 38.2dB SNDR at Nyquist in 16nm CMOS FinFET. - Jaeduk Han; Eric Chang; Stevo Bailey; Zhongkai Wang; Woo-Rham Bae; Angie Wang; Nathan Narevsky; Amy Whitcombe; Pengpeng Lu; Borivoje Nikolic; Elad Alon (CICC, 2019)

A Fully Integrated 160Gb/s D-Band Transmitter with 1.1 pJ/b Efficiency in 22nm FinFET Technology. - Steven Callender; Amy Whitcombe; Abhishek Agrawal; Ritesh Bhat; Mustafijur Rahman; Chun C. Lee; Peter Sagazio; Georgios C. Dogiamis; Brent R. Carlton; Mark Chakravorti; Stefano Pellerano; Christopher D. Hull (ISSCC, 2022)

A 6.0mW 3.8GS/s 7b VTC/TDC-Assisted Interleaved SAR ADC with 13GHz ERBW. - Amy Whitcombe; Chun C. Lee; Asma Kuriparambil Thekkumpate; Somnath Kundu; Jaykant Timbadiya; Abhishek Agrawal; Brent R. Carlton; Peter Sagazio; Stefano Pellerano; Christopher D. Hull (VLSI Technology and Circuits, 2022)

A Fully Integrated 160-Gb/s D-Band Transmitter Achieving 1.1-pJ/b Efficiency in 22-nm FinFET. - Steven Callender; Abhishek Agrawal; Amy Whitcombe; Ritesh Bhat; Mustafijur Rahman; Chun C. Lee; Peter Sagazio; Georgios C. Dogiamis; Brent R. Carlton; Christopher D. Hull; Stefano Pellerano (IEEE J. Solid State Circuits, 2022)

A 128Gb/s 1.95pJ/b D-Band Receiver with Integrated PLL and ADC in 22nm FinFET. - Abhishek Agrawal; Amy Whitcombe; Woorim Shin; Ritesh Bhat; Somnath Kundu; Peter Sagazio; Hariprasad Chandrakumar; Thomas William Brown; Brent R. Carlton; Christopher D. Hull; Steven Callender; Stefano Pellerano (ISSCC, 2023)

A VTC/TDC-Assisted 4× Interleaved 3.8 GS/s 7b 6.0 mW SAR ADC With 13 GHz ERBW. - Amy Whitcombe; Chun C. Lee; Asma Kuriparambil Thekkumpate; Somnath Kundu; Jaykant Timbadiya; Abhishek Agrawal; Brent R. Carlton; Peter Sagazio; Stefano Pellerano; Christopher D. Hull (IEEE J. Solid State Circuits, 2023)

A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET. - Abhishek Agrawal; Amy Whitcombe; Woorim Shin; Ritesh Bhat; Somnath Kundu; Peter Sagazio; Hariprasad Chandrakumar; Thomas William Brown; Brent R. Carlton; Christopher Dennis Hull; Steven Callender; Stefano Pellerano (IEEE J. Solid State Circuits, 2023)

D-Band meets FinFET: Fully-Integrated Transmitter and Receiver Architectures for 100+Gb/s Links. - Steven Callender; Abhishek Agrawal; Amy Whitcombe; Stefano Pellerano (BCICTS, 2024)

22.3 A 76mW 40GS/s 7b Time-Interleaved Hybrid Voltage/Time-Domain ADC with Common-Mode Input Tracking. - Amy Whitcombe; Somnath Kundu; Hariprasad Chandrakumar; Abhishek Agrawal; Thomas William Brown; Steven Callender; Brent R. Carlton; Stefano Pellerano (ISSCC, 2024)