Flip-Chip Routing With I/O Planning Considering Practical Pad Assignment Constraints. - Tao-Chun Yu; An-Jie Shih; Shao-Yun Fang (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Guiding Template Design for Lamellar DSA with Multiple Patterning and Self-Aligned Via Process. - An-Jie Shih; Shao-Yun Fang; Yi-Yu Liu (ICCAD, 2020)

Enhanced and Efficient Guiding Template Design for Lamellar DSA With Graph Monomorphism. - Yi-Sian Ciou; An-Jie Shih; Shao-Yun Fang; Yi-Yu Liu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)