A Multi-layer 2-D Adaptive Filtering Architecture Based on McClellan Transformation. - K. J. Ray Liu; An-Yeu Wu (ISCAS, 1993)

A Low-Power and Low-Complexity DCT/IDCT VLSI Architecture Based On Backward Chebyshev Recursion. - An-Yeu Wu; K. J. Ray Liu (ISCAS, 1994)

Algorithm-based low-power transform coding architectures. - An-Yeu Wu; K. J. Ray Liu (ICASSP, 1995)

Parallel programmable video co-processor design. - An-Yeu Wu; K. J. Ray Liu; Arun Raghupathy; Shang-Chieh Liu (ICIP, 1995)

Cost-efficient parallel lattice VLSI architecture for the IFFT/FFT in DMT transceiver technology. - An-Yeu Wu; Tsun-Shan Chan (ICASSP, 1998)

Algorithm-based low-power and high-performance multimedia signal processing. - K. J. Ray Liu; An-Yeu Wu; Arun Raghupathy; Jie Chen 002 (Proc. IEEE, 1998)

System architecture of an adaptive reconfigurable DSP computing engine. - An-Yeu Wu; K. J. Ray Liu; Arun Raghupathy (IEEE Trans. Circuits Syst. Video Technol., 1998)

Algorithm-based low-power transform coding architectures: the multirate approach. - An-Yeu Wu; K. J. Ray Liu (IEEE Trans. Very Large Scale Integr. Syst., 1998)

A novel multirate adaptive FIR filtering algorithm and structure. - Cheng-Shing Wu; An-Yeu Wu (ICASSP, 1999)

Design methodology for Booth-encoded Montgomery module design for RSA cryptosystem. - Jye-Jong Leu; An-Yeu Wu (ISCAS, 2000)

Modified vector rotational CORDIC (MVR-CORDIC) algorithm and its application to FFT. - Cheng-Shing Wu; An-Yeu Wu (ISCAS, 2000)

Cost-efficient multiplier-less FIR filter structure based on modified DECOR transformation. - I-Hsien Lee; Cheng-Shing Wu; An-Yeu Wu (ICASSP, 2001)

A novel trellis-based searching scheme for EEAS-based CORDIC algorithm. - Cheng-Shing Wu; An-Yeu Wu (ICASSP, 2001)

A unified design framework for vector rotational CORDIC family based on angle quantization process. - An-Yeu Wu; Cheng-Shing Wu (ICASSP, 2001)

A cost-effective TEQ algorithm for ADSL systems. - Chih-Chi Wang; An-Yeu Wu; Bor-Ming Wang (ICC, 2001)

An improved time-recursive lattice structure for low-latency IFFT architecture in DMT transmitter. - Chi-Li Yu; An-Yeu Wu (ISCAS (4), 2001)

A novel cost-effective multi-path adaptive interpolated FIR (IFIR)-based echo canceller. - Cheng-Shing Wu; An-Yeu Wu (ISCAS (5), 2002)

A new pipelined adaptive DFE architecture with improved convergence rate. - Meng-Da Yang; An-Yeu Wu (ISCAS (4), 2002)

A Reduced-Complexity Fast Algorithm for Software Implementation of the IFFT/FFT in DMT Systems. - Tsun-Shan Chan; Jen-Chih Kuo; An-Yeu Wu (EURASIP J. Adv. Signal Process., 2002)

Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for scaling-free high-performance rotational operations. - Zhi-Xiu Lin; An-Yeu Wu (ICASSP (2), 2003)

Angle quantization approach for lattice IIR filter implementation and its trellis de-allocation algorithm. - An-Yeu Wu; I-Hsien Lee; Cheng-Shing Wu (ICASSP (2), 2003)

Implementation of a programmable 64 2048-point FFT/IFFT processor for OFDM-based communication systems. - Jen-Chih Kuo; Ching-Hua Wen; An-Yeu Wu (ISCAS (2), 2003)

VLSI Design of a Variable-Length FFT/IFFT Processor for OFDM-Based Communication Systems. - Jen-Chih Kuo; Ching-Hua Wen; Chih-Hsiu Lin; An-Yeu Wu (EURASIP J. Adv. Signal Process., 2003)

Editorial. - An-Yeu Wu; Ut-Va Koc; Keshab K. Parhi; Sergios Theodoridis (EURASIP J. Adv. Signal Process., 2003)

A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes. - Cheng-Shing Wu; An-Yeu Wu; Chih-Hsiu Lin (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A Novel Low-Cost Multi-Mode Reed Solomon Decoder Design Based on Peterson-Gorenstein-Zierler Algorithm. - Huai-Yi Hsu; Sheng-Feng Wang; An-Yeu Wu (J. VLSI Signal Process., 2003)

VLSI design of dual-mode Viterbi/turbo decoder for 3GPP. - Kai Huang; Fan-Min Li; Pei-Ling Shen; An-Yeu Wu (ISCAS (2), 2004)

A design flow for multiplierless linear-phase FIR filters: from system specification to Verilog code. - Kai-Yuan Jheng; Shyh-Jye Jou; An-Yeu Wu (ISCAS (5), 2004)

1000BASE-T Gigabit Ethernet baseband DSP IC design. - Hsiu-Ping Lin; Nancy Fang-Yih Chen; Jyh-Ting Lai; An-Yeu Wu (ISCAS (4), 2004)

Least squares approximation-based ROM-free direct digital frequency synthesizer. - Ching-Hua Wen; Huai-Yi Hsu; Hung Yang Ko; An-Yeu Wu (ISCAS (2), 2004)

Fast convergent pipelined adaptive DFE architecture using post-cursor processing filter technique. - Meng-Da Yang; An-Yeu Wu; Jyh-Ting Lai (IEEE Trans. Circuits Syst. II Express Briefs, 2004)

High-performance VLSI architecture of adaptive decision feedback equalizer based on predictive parallel branch slicer (PPBS) scheme. - Meng-Da Yang; An-Yeu Wu; Jyh-Ting Lai (IEEE Trans. Very Large Scale Integr. Syst., 2004)

Low cost decision feedback equalizer (DFE) design for Giga-bit systems. - Chih-Hsiu Lin; An-Yeu Wu (ICASSP (3), 2005)

Digital signal processing engine design for polar transmitter in wireless communication systems. - Hung Yang Ko; Yi-Chiuan Wang; An-Yeu Wu (ISCAS (6), 2005)

A memory-reduced log-MAP kernel for turbo decoder. - Tsung-Han Tsai 001; Cheng-Hung Lin; An-Yeu Wu (ISCAS (2), 2005)

A 2Gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applications. - I-Chyn Wey; Lung-Hao Chang; You-Gang Chen; Shih-Hung Chang; An-Yeu Wu (ISCAS (2), 2005)

A scalable DCO design for portable ADPLL designs. - Chia-Tsun Wu; Wei Wang 252; I-Chyn Wey; An-Yeu Wu (ISCAS (6), 2005)

Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for high-performance vector rotational DSP applications. - Chih-Hsiu Lin; An-Yeu Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Soft-threshold-based multilayer decision feedback equalizer (STM-DFE) algorithm and VLSI architecture. - Chih-Hsiu Lin; An-Yeu Wu (IEEE Trans. Signal Process., 2005)

DSP engine design for LINC wireless transmitter systems. - Kai-Yuan Jheng; Yi-Chiuan Wang; An-Yeu Wu; Hen-Wai Tsao (ISCAS, 2006)

A portable all-digital pulsewidth control loop for SOC applications. - Wei Wang 252; I-Chyn Wey; Chia-Tsun Wu; An-Yeu Wu (ISCAS, 2006)

A frequency estimation algorithm for ADPLL designs with two-cycle lock-in time. - Chia-Tsun Wu; Wei Wang 252; I-Chyn Wey; An-Yeu Wu (ISCAS, 2006)

A Shortened Impulse Response Filter (SIRF) Scheme for Cost-Effective Echo Canceller Design of 10GBase-T Ethernet System. - Ming-Feng Hsu; Yen-Liang Chen; Kai-Yuan Jheng; An-Yeu Wu (SiPS, 2006)

A Robust Band-Tracking Packet Detector (BT-PD) in OFDM-Based Ultra-Wideband Systems. - Jyh-Ting Lai; Chun-Yuan Chu; An-Yeu Wu; Wen-Chiang Chen (SiPS, 2006)

A Low Cost Packet Detector in OFDM-Based Ultra-Wideband Systems. - Jyh-Ting Lai; Chun-Yuan Chu; An-Yeu Wu; Wen-Chiang Chen (SiPS, 2006)

Rapid IP Design of Variable-length Cached-FFT Processor for OFDM-based Communication Systems. - Yu-Hung Lee; Tzu-Hao Yu; Kuo-Ken Huang; An-Yeu Wu (SiPS, 2006)

A New Early Termination Scheme of Iterative Turbo Decoding Using Decoding Threshold. - Fan-Min Li; Cheng-Hung Lin; An-Yeu Wu (SiPS, 2006)

On-Line MSR-CORDIC VLSI Architecture with Applications to Cost-Efficient Rotation-Based Adaptive Filtering Systems. - Tzu-Hao Yu; Chi-Li Yu; Kai-Yuan Jheng; An-Yeu Wu (SiPS, 2006)

Area-Efficient VLSI Design of Reed-Solomon Decoder for 10GBase-LX4 Optical Communication Systems. - Huai-Yi Hsu; An-Yeu Wu; Jih-Chiang Yeo (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

High-Performance VLSI Architecture of Decision Feedback Equalizer for Gigabit Systems. - Chih-Hsiu Lin; An-Yeu Wu; Fan-Min Li (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

Multi-Symbol-Sliced Dynamically Reconfigurable Reed-Solomon Decoder Design Based on Unified Finite-Field Processing Element. - Huai-Yi Hsu; Jih-Chiang Yeo; An-Yeu Wu (IEEE Trans. Very Large Scale Integr. Syst., 2006)

A Power-Aware Reconfigurable Rendering Engine Design with 453MPixels/s, 16.4MTriangles/s Performance. - Chih-Hao Chao; Yen-Lin Kuo; An-Yeu Wu; Weber Chien (ISCAS, 2007)

Ensemble Dependent Matrix Methodology for Probabilistic-Based Fault-tolerant Nanoscale Circuit Design. - Huifei Rao; Jie Chen 002; Changhong Yu; Woon Tiong Ang; I-Chyn Wey; An-Yeu Wu; Hong Zhao (ISCAS, 2007)

Low-Latency Quasi-Synchronous Transmission Technique for Multiple-Clock-Domain IP Modules. - Jhao-Ji Ye; You-Gang Chen; I-Chyn Wey; An-Yeu Wu (ISCAS, 2007)

A New Binomial Mapping and Optimization Algorithm for Reduced-Complexity Mesh-Based On-Chip Network. - Wein-Tsung Shen; Chih-Hao Chao; Yu-Kuang Lien; An-Yeu Wu (NOCS, 2007)

Robust Packet Detector based Automatic Gain Control Algorithm for OFDM-based Ultra-WideBand systems. - Chun-Yuan Chu; Jyh-Ting Lai; An-Yeu Wu (SiPS, 2007)

Multilevel Linc System Design for Power Efficiency Enhancement. - Kai-Yuan Jheng; Yuan-Jyue Chen; An-Yeu Wu (SiPS, 2007)

Dynamic Channel Flow Control of Networks-on-Chip Systems for High Buffer Efficiency. - Sung-Tze Wu; Chih-Hao Chao; I-Chyn Wey; An-Yeu Wu (SiPS, 2007)

Reconfigurable Color Doppler DSP Engine for High-Frequency Ultrasonic Imaging Systems. - Tzu-Hao Yu; Shih-Yu Sun; Chih-Liang Ding; Pai-Chi Li; An-Yeu Wu (SiPS, 2007)

On the Fixed-Point Properties of Mixed-Scaling-Rotation Cordic Algorithm. - Chi-Li Yu; Tzu-Hao Yu; An-Yeu Wu (SiPS, 2007)

On the New Stopping Criteria of Iterative Turbo Decoding by Using Decoding Threshold. - Fan-Min Li; An-Yeu Wu (IEEE Trans. Signal Process., 2007)

Joint AGC-Equalization Algorithm and VLSI Architecture for Wirelined Transceiver Designs. - Jyh-Ting Lai; An-Yeu Wu; Chien-Hsiung Lee (IEEE Trans. Very Large Scale Integr. Syst., 2007)

A Systematic Design Approach to the Band-Tracking Packet Detector in OFDM-Based Ultrawideband Systems. - Jyh-Ting Lai; An-Yeu Wu; Wen-Chiang Chen (IEEE Trans. Veh. Technol., 2007)

High-performance scheduling algorithm for partially parallel LDPC decoder. - Cheng-Zhou Zhan; Xin-Yu Shih; An-Yeu Wu (ICASSP, 2008)

Cost-effective echo and NEXT canceller designs for 10GBASE-T ethernet system. - Yen-Liang Chen; Cheng-Zhou Zhan; An-Yeu Wu (ISCAS, 2008)

Low-power traceback MAP decoding for double-binary convolutional turbo decoder. - Cheng-Hung Lin; Chun-Yu Chen; An-Yeu Wu (ISCAS, 2008)

An efficient methodology to evaluate nanoscale circuit fault-tolerance performance based on belief propagation. - Huifei Rao; Jie Chen 002; Vicky H. Zhao; Woon Tiong Ang; I-Chyn Wey; An-Yeu Wu (ISCAS, 2008)

Location-Constrained Particle Filter human positioning and tracking system. - Chih-Hao Chao; Chun-Yuan Chu; An-Yeu Wu (SiPS, 2008)

High-throughput dual-mode single/double binary map processor design for wireless wan. - Chun-Yu Chen; Cheng-Hung Lin; An-Yeu Wu (SiPS, 2008)

Traffic-balanced IP mapping algorithm for 2D-mesh On-Chip-Networks. - Ting-Jung Lin; Shu-Yen Lin; An-Yeu Wu (SiPS, 2008)

An 8.29 mm2 52 mW Multi-Mode LDPC Decoder Design for Mobile WiMAX System in 0.13 µm CMOS Process. - Xin-Yu Shih; Cheng-Zhou Zhan; Cheng-Hung Lin; An-Yeu Wu (IEEE J. Solid State Circuits, 2008)

Traffic-Balanced Routing Algorithm for Irregular Mesh-Based On-Chip Networks. - Shu-Yen Lin; Chun-Hsiang Huang; Chih-Hao Chao; Keng-Hsien Huang; An-Yeu Wu (IEEE Trans. Computers, 2008)

Unified Convolutional/Turbo Decoder Design Using Tile-Based Timing Analysis of VA/MAP Kernel. - Fan-Min Li; Cheng-Hung Lin; An-Yeu Wu (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Design and Analysis of Isolated Noise-Tolerant (INT) Technique in Dynamic CMOS Circuits. - I-Chyn Wey; You-Gang Chen; An-Yeu Wu (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Cost-Effective Joint Echo-NEXT Canceller Designs for 10GBase-T Ethernet Systems Based on a Shortened Impulse Response Filter (SIRF) Scheme. - Yen-Liang Chen; Ming-Feng Hsu; Jyh-Ting Lai; An-Yeu Wu (J. Signal Process. Syst., 2008)

A 52-mW 8.29mm2 19-mode LDPC decoder chip for mobile WiMAX applications. - Xin-Yu Shih; Cheng-Zhou Zhan; Cheng-Hung Lin; An-Yeu Wu (ASP-DAC, 2009)

A Triple-mode LDPC Decoder Design for IEEE 802.11n SYSTEM. - Min-An Chao; Jen-Yang Wen; Xin-Yu Shih; An-Yeu Wu (ISCAS, 2009)

A Scalable Built-in Self-test/Self-diagnosis Architecture for 2D-Mesh based Chip Multiprocessor Systems. - Shu-Yen Lin; Chan-Cheng Hsu; An-Yeu Wu (ISCAS, 2009)

A Channel-Adaptive Early Termination strategy for LDPC decoders. - Yu-Hsin Chen; Yi-Ju Chen; Xin-Yu Shih; An-Yeu Wu (SiPS, 2009)

Multilevel LINC System Designs for Power Efficiency Enhancement of Transmitters. - Kai-Yuan Jheng; Yuan-Jyue Chen; An-Yeu Wu (IEEE J. Sel. Top. Signal Process., 2009)

Low-Power Memory-Reduced Traceback MAP Decoding for Double-Binary Convolutional Turbo Decoder. - Cheng-Hung Lin; Chun-Yu Chen; Tsung-Han Tsai 001; An-Yeu Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Design and Implementation of Cost-Effective Probabilistic-Based Noise-Tolerant VLSI Circuits. - I-Chyn Wey; You-Gang Chen; Changhong Yu; An-Yeu Wu; Jie Chen 002 (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A 2.17 mm2 125 mW reconfigurable SVD chip for IEEE 802.11n system. - Yen-Liang Chen; Ting-Jyun Jheng; Cheng-Zhou Zhan; An-Yeu Wu (ESSCIRC, 2010)

Regional ACO-based routing for load-balancing in NoC systems. - Hsien-Kai Hsin; En-Jui Chang; Chih-Hao Chao; An-Yeu Wu (NaBIC, 2010)

Traffic- and Thermal-Aware Run-Time Thermal Management Scheme for 3D NoC Systems. - Chih-Hao Chao; Kai-Yuan Jheng; Haoyu Wang; Jia-Cheng Wu; An-Yeu Wu (NOCS, 2010)

A Two-Cycle Lock-In Time ADPLL Design Based on a Frequency Estimation Algorithm. - Chia-Tsun Wu; Wen-Chung Shen; Wei Wang 252; An-Yeu Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Generalized pipelined tomlinson-harashima precoder design methodology with build-in arbitrary speed-up factors. - Yen-Liang Chen; An-Yeu Wu (IEEE Trans. Signal Process., 2010)

Adaptive thresholding incorporating temporal and spatial information with eigen-based clutter filter for color Doppler processing in ultrasonic systems. - Cheng-Zhou Zhan; Zih-Ling Liu; An-Yeu Wu (SiPS, 2011)

Transport Layer Assisted Routing for Non-Stationary Irregular mesh of thermal-aware 3D Network-on-Chip systems. - Chih-Hao Chao; Tsu-Chu Yin; Shu-Yen Lin; An-Yeu Wu (SoCC, 2011)

Multi-Pheromone ACO-based routing in Network-on-Chip system inspired by economic phenomenon. - Hsien-Kai Hsin; En-Jui Chang; Chih-Hao Chao; Shu-Yen Lin; An-Yeu Wu (SoCC, 2011)

A scalable built-in self-recovery (BISR) VLSI architecture and design methodology for 2D-mesh based on-chip networks. - Kun-Chih Chen; Shu-Yen Lin; Wen-Chung Shen; An-Yeu Wu (Des. Autom. Embed. Syst., 2011)

Multi-prediction particle filter for efficient parallelized implementation. - Chun-Yuan Chu; Chih-Hao Chao; Min-An Chao; An-Yeu Wu (EURASIP J. Adv. Signal Process., 2011)

Area-Efficient Scalable MAP Processor Design for High-Throughput Multistandard Convolutional Turbo Decoding. - Cheng-Hung Lin; Chun-Yu Chen; An-Yeu Wu (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools. - David Chih-Wei Chang; Tay-Jyi Lin; Chung-Ju Wu; Jenq Kuen Lee; Yuan-Hua Chu; An-Yeu Wu (J. Signal Process. Syst., 2011)

Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part II: Application Programming. - Jia-Ming Chen; Chun-Nan Liu; Jen-Kuei Yang; Shau-Yin Tseng; Wei-Kuan Shih; An-Yeu Wu (J. Signal Process. Syst., 2011)

Path-Diversity-Aware Adaptive Routing in Network-on-Chip Systems. - Yu-Hsin Kuo; Po-An Tsai; Hao-Ping Ho; En-Jui Chang; Hsien-Kai Hsin; An-Yeu Andy Wu (MCSoC, 2012)

Coherent Image Herding of Inhomogeneous Motion Compensation for Synthetic Transmit Aperture in Ultrasound Image. - Yu-Hao Chen; Kuan-Yu Ho; Cheng-Zhou Zhan; An-Yeu Andy Wu (SiPS, 2012)

Traffic-Balanced Topology-Aware Multiple Routing Adjustment for Throttled 3D NOC Systems. - Kun-Chih Chen; Shu-Yen Lin; Hui-Shun Hung; An-Yeu Wu (SiPS, 2012)

A Low-Complexity Grouping FFT-Based Codebook Searching Algorithm in LTE System. - Yi-Hsuan Lin; Cheng-Zhou Zhan; Chun-Yuan Chu; An-Yeu Andy Wu (SiPS, 2012)

ACO-Based Deadlock-Aware Fully-Adaptive Routing in Network-on-Chip Systems. - Kuan-Yu Su; Hsien-Kai Hsin; En-Jui Chang; An-Yeu Andy Wu (SiPS, 2012)

Transport-layer assisted vertical traffic balanced routing for thermal-aware three-dimensional Network-on-Chip systems. - Kun-Chih Chen; Chih-Hao Chao; Shu-Yen Lin; Hui-Shun Hung; An-Yeu Wu (VLSI-DAT, 2012)

Foreword. - An-Yeu Wu; Li-C. Wang (VLSI-DAT, 2012)

Networks-on-Chip: Architectures, Design Methodologies, and Case Studies. - Sao-Jie Chen; An-Yeu Andy Wu; Jiang Xu (J. Electr. Comput. Eng., 2012)

Iterative Superlinear-Convergence SVD Beamforming Algorithm and VLSI Architecture for MIMO-OFDM Systems. - Cheng-Zhou Zhan; Yen-Liang Chen; An-Yeu Wu (IEEE Trans. Signal Process., 2012)

Matrix Merging Scheme and Efficient Decoding Techniques for Reconfigurable QC-LDPC Decoders. - Min-An Chao; Xin-Yu Shih; An-Yeu Wu (J. Signal Process. Syst., 2012)

Power-Efficient State Exchange Scheme for Low-Latency SMU Design of Viterbi Decoder. - Chun-Yuan Chu; An-Yeu Wu (J. Signal Process. Syst., 2012)

Cost-effective scalable QC-LDPC decoder designs for non-volatile memory systems. - Ming-Han Chung; Yu-Min Lin; Cheng-Zhou Zhan; An-Yeu Wu (ICASSP, 2013)

Motion artifact elimination algorithm with eigen-based clutter filter for color Doppler processing. - Zih-Ling Liu; Yu-Hao Chen; Cheng-Zhou Zhan; An-Yeu Andy Wu (ICASSP, 2013)

Traffic- and Thermal-aware Adaptive Beltway Routing for three dimensional Network-on-Chip systems. - Kun-Chih Chen; Che-Chuan Kuo; Hui-Shun Hung; An-Yeu Andy Wu (ISCAS, 2013)

VLSI implementation of real-time motion compensated beamforming in synthetic transmit aperture imaging. - Kuan-Yu Ho; Yu-Hao Chen; Cheng-Zhou Zhan; An-Yeu Andy Wu (ISCAS, 2013)

Proactive Thermal-Budget-Based Beltway Routing algorithm for thermal-aware 3D NoC systems. - Che-Chuan Kuo; Kun-Chih Chen; En-Jui Chang; An-Yeu Wu (ISSoC, 2013)

Accelerating motion-compensated adaptive color Doppler engine on CUDA-based GPU platform. - I-Hsuan Lee; Yu-Hao Chen; Nai-Shan Huang; An-Yeu Andy Wu (SiPS, 2013)

ACO-based fault-aware routing algorithm for Network-on-Chip systems. - Chia-An Lin; Hsien-Kai Hsin; En-Jui Chang; An-Yeu Andy Wu (SiPS, 2013)

Design of thermal management unit with vertical throttling scheme for proactive thermal-aware 3D NoC systems. - Kun-Chih Chen; Shu-Yen Lin; An-Yeu Wu (VLSI-DAT, 2013)

Hybrid path-diversity-aware adaptive routing with latency prediction model in Network-on-Chip systems. - Po-An Tsai; Yu-Hsin Kuo; En-Jui Chang; Hsien-Kai Hsin; An-Yeu Wu (VLSI-DAT, 2013)

Implementation of ACO-Based Selection with Backward-Ant Mechanism for Adaptive Routing in Network-on-Chip Systems. - Hsien-Kai Hsin; En-Jui Chang; An-Yeu Wu (IEEE Embed. Syst. Lett., 2013)

Editorial: Low-Power, Intelligent, and Secure Solutions for Realization of Internet of Things. - Yen-Kuang Chen; An-Yeu Wu; Magdy A. Bayoumi; Farinaz Koushanfar (IEEE J. Emerg. Sel. Topics Circuits Syst., 2013)

Securing M2M With Post-Quantum Public-Key Cryptography. - Jie-Ren Shih; Yongbo Hu; Ming-Chun Hsiao; Ming-Shing Chen; Wen-Chung Shen; Bo-Yin Yang; An-Yeu Wu; Chen-Mou Cheng (IEEE J. Emerg. Sel. Topics Circuits Syst., 2013)

New Ping-Pong Scheduling for Low-Latency EMD Engine Design in Hilbert-Huang Transform. - Wen-Chung Shen; Hsiao-I Jen; An-Yeu Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

Transport-layer-assisted routing for runtime thermal management of 3D NoC systems. - Chih-Hao Chao; Kun-Chih Chen; Tsu-Chu Yin; Shu-Yen Lin; An-Yeu Wu (ACM Trans. Embed. Comput. Syst., 2013)

Topology-Aware Adaptive Routing for Nonstationary Irregular Mesh in Throttled 3D NoC Systems. - Kun-Chih Chen; Shu-Yen Lin; Hui-Shun Hung; An-Yeu Andy Wu (IEEE Trans. Parallel Distributed Syst., 2013)

Dual-Mode Low-Complexity Codebook Searching Algorithm and VLSI Architecture for LTE/LTE-Advanced Systems. - Yi-Hsuan Lin; Yu-Hao Chen; Chun-Yuan Chu; Cheng-Zhou Zhan; An-Yeu Wu (IEEE Trans. Signal Process., 2013)

Routing-Based Traffic Migration and Buffer Allocation Schemes for 3-D Network-on-Chip Systems With Thermal Limit. - Chih-Hao Chao; Kun-Chih Chen; An-Yeu Wu (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Reconfigurable Adaptive Singular Value Decomposition Engine Design for High-Throughput MIMO-OFDM Systems. - Yen-Liang Chen; Cheng-Zhou Zhan; Ting-Jyun Jheng; An-Yeu Wu (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Reconfigurable Parallel Turbo Decoder Design for Multiple High-Mobility 4G Systems. - Cheng-Hung Lin; Chun-Yu Chen; En-Jui Chang; An-Yeu Wu (J. Signal Process. Syst., 2013)

Adaptive filter-based reconstruction engine design for compressive sensing. - Nai-Shan Huang; Yu-Min Lin; Yi Chen; An-Yeu Andy Wu (APCCAS, 2014)

High performance adaptive routing for Network-on-Chip systems with express highway mechanism. - Shih-Chieh Lin; En-Jui Chang; Yu-Yin Chen; Hsien-Kai Hsin; An-Yeu Andy Wu (APCCAS, 2014)

A stroke severity monitoring system based on quantitative modified multiscale entropy. - Wei-Jung Jou; Pei-Wen Huang; Yu-Min Lin; Sung-Chun Tang; Dar-Ming Lai; An-Yeu Wu (BioCAS, 2014)

Robust decision feedback equalizer scheme by using sphere-decoding detector. - Hung-Yi Cheng; Chun-Yuan Chu; Yen-Liang Chen; An-Yeu Andy Wu (ICASSP, 2014)

High-throughput QC-LDPC decoder with cost-effective early termination scheme for non-volatile memory systems. - Yu-Min Lin; Yu-Hao Chen; Ming-Han Chung; An-Yeu Wu (ISCAS, 2014)

Hydra: An Energy-Efficient Programmable Cryptographic Coprocessor Supporting Elliptic-Curve Pairings over Fields of Large Characteristics. - Yun-An Chang; Wei-Chih Hong; Ming-Chun Hsiao; Bo-Yin Yang; An-Yeu Wu; Chen-Mou Cheng (IWSEC, 2014)

Trend-extracted MSE based on adaptive aligned EEMD with early termination scheme: Analysis of the acute stroke patients' physiological signals. - Pei-Wen Huang; Wei-Jung Jou; Yu-Min Lin; Hsiao-I Jen; Sung-Chun Tang; Dar-Ming Lai; An-Yeu Andy Wu (SiPS, 2014)

LMS-based adaptive temperature prediction scheme for proactive thermal-aware three-dimensional Network-on-Chip systems. - Kun-Chih Chen; Huai-Ting Li; An-Yeu Andy Wu (VLSI-DAT, 2014)

Thermal-aware Dynamic Buffer Allocation for Proactive routing algorithm on 3D Network-on-Chip systems. - Yuan-Sheng Lee; Hsien-Kai Hsin; Kun-Chih Chen; En-Jui Chang; An-Yeu Andy Wu (VLSI-DAT, 2014)

Low-complexity sinusoidal-assisted EMD (SAEMD) algorithms for solving mode-mixing problems in HHT. - Wen-Chung Shen; Yu-Hao Chen; An-Yeu Andy Wu (Digit. Signal Process., 2014)

Path-Congestion-Aware Adaptive Routing With a Contention Prediction Scheme for Network-on-Chip Systems. - En-Jui Chang; Hsien-Kai Hsin; Shu-Yen Lin; An-Yeu Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Ant Colony Optimization-Based Fault-Aware Routing in Mesh-Based Network-on-Chip Systems. - Hsien-Kai Hsin; En-Jui Chang; Chia-An Lin; An-Yeu Andy Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Spatial-Temporal Enhancement of ACO-Based Selection Schemes for Adaptive Routing in Network-on-Chip Systems. - Hsien-Kai Hsin; En-Jui Chang; An-Yeu Wu (IEEE Trans. Parallel Distributed Syst., 2014)

Low-Complexity Motion-Compensated Beamforming Algorithm and Architecture for Synthetic Transmit Aperture in Ultrasound Imaging. - Yu-Hao Chen; Yu-Min Lin; Kuan-Yu Ho; An-Yeu Wu; Pai-Chi Li (IEEE Trans. Signal Process., 2014)

Compressive sensing based ECG telemonitoring with personalized dictionary basis. - Yu-Min Lin; Yi Chen; Hung-Chi Kuo; An-Yeu Andy Wu (BioCAS, 2015)

Predicting stroke outcomes based on multi-modal analysis of physiological signals. - Pei-Wen Huang; Sung-Chun Tang; Yu-Min Lin; You-Cheng Liu; Wei-Jung Jou; Hsiao-I Jen; Dar-Ming Lai; An-Yeu Wu (DSP, 2015)

A 1.96mm2 low-latency multi-mode crypto-coprocessor for PKC-based IoT security protocols. - Cheng-Rung Tsai; Ming-Chun Hsiao; Wen-Chung Shen; An-Yeu Andy Wu; Chen-Mou Cheng (ISCAS, 2015)

Variation-aware core-level redundancy scheme for reliable DSP computation in multi-core systems. - Wei-Ching Chu; Huai-Ting Li; Ching-Yao Chou; An-Yeu Andy Wu (SiPS, 2015)

Low-complexity hybrid precoding algorithm based on orthogonal beamforming codebook. - Wei-Lun Hung; Chiang-Hen Chen; Ching-Chun Liao; Cheng-Rung Tsai; An-Yeu Andy Wu (SiPS, 2015)

Scalable compressive sensing-based multi-user detection scheme for Internet-of-Things applications. - Jiachen Liu; Hung-Yi Cheng; Ching-Chun Liao; An-Yeu Andy Wu (SiPS, 2015)

Dynamic group allocation reconstruction for group sparse signals. - Yi-Mu Tu; Michael C. Chang; Yu-Min Lin; An-Yeu Andy Wu (SiPS, 2015)

Low memory-cost scramble methods for constructing deterministic CS matrix. - Jie-Fang Zhang; Jing Geng; Yu-Min Lin; An-Yeu Andy Wu (SiPS, 2015)

An algorithmic error-resilient scheme for robust LDPC decoding. - Huai-Ting Li; Ding-Yuan Lee; Kun-Chih Chen; An-Yeu Andy Wu (VLSI-DAT, 2015)

Regional ACO-Based Cascaded Adaptive Routing for Traffic Balancing in Mesh-Based Network-on-Chip Systems. - En-Jui Chang; Hsien-Kai Hsin; Chih-Hao Chao; Shu-Yen Lin; An-Yeu Andy Wu (IEEE Trans. Computers, 2015)

Ant Colony Optimization-Based Adaptive Network-on-Chip Routing Framework Using Network Information Region. - Hsien-Kai Hsin; En-Jui Chang; Kuan-Yu Su; An-Yeu Andy Wu (IEEE Trans. Computers, 2015)

Byte-Reconfigurable LDPC Codec Design With Application to High-Performance ECC of NAND Flash Memory Systems. - Yu-Min Lin; Huai-Ting Li; Ming-Han Chung; An-Yeu Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

RC-Based Temperature Prediction Scheme for Proactive Dynamic Thermal Management in Throttle-Based 3D NoCs. - Kun-Chih Chen; En-Jui Chang; Huai-Ting Li; An-Yeu Andy Wu (IEEE Trans. Parallel Distributed Syst., 2015)

Reliable PPG-based algorithm in atrial fibrillation detection. - Shih-Ming Shan; Sung-Chun Tang; Pei-Wen Huang; Yu-Min Lin; Wei-Han Huang; Dar-Ming Lai; An-Yeu Andy Wu (BioCAS, 2016)

Progressive channel estimation for ultra-low latency millimeter-wave communications. - Hung-Yi Cheng; Ching-Chun Liao; An-Yeu Andy Wu (GlobalSIP, 2016)

Joint spatially sparse channel estimation for millimeter-wave cellular systems. - Cheng-Rung Tsai; Chiang-Hen Chen; Yu-Hsin Liu; An-Yeu Andy Wu (GlobalSIP, 2016)

Unified low-complexity decision feedback equalizer with adjustable double radius constraint. - Hung-Yi Cheng; An-Yeu Andy Wu (Digit. Signal Process., 2016)

Dynamic Reconfigurable Ternary Content Addressable Memory for OpenFlow-Compliant Low-Power Packet Processing. - Ting-Sheng Chen; Ding-Yuan Lee; Tsung-Te Liu; An-Yeu Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Overview of high-efficiency ant colony optimization (ACO)-based adaptive routings for traffic balancing in network-on-chip systems. - En-Jui Chang; An-Yeu Wu (ASICON, 2017)

Compressive sensing based ECG monitoring with effective AF detection. - Hung-Chi Kuo; Yu-Min Lin; An-Yeu Wu (ICASSP, 2017)

Thermal/Traffic Mutual-Coupling Co-simulation Platform for 3D Network-on-Chip (NoC) Designs. - An-Yeu Andy Wu; Kun-Chih Jimmy Chen; Chih-Hao Chao (NoCArc@MICRO, 2017)

Reliable compressive sensing (CS)-based multi-user detection with power-based Zadoff-Chu sequence design. - Chieh-Fang Teng; Ching-Chun Liao; Hung-Yi Cheng; An-Yeu Andy Wu (SiPS, 2017)

Robust compressed analysis using subspace-based dictionary for ECG telemonitoring systems. - Meng-Ya Tsai; Ching-Yao Chou; An-Yeu Andy Wu (SiPS, 2017)

Low-latency Voltage-Racing Winner-Take-All (VR-WTA) circuit for acceleration of learning engine. - Chia-Heng Wu; Ting-Sheng Chen; Ding-Yuan Lee; Tsung-Te Liu; An-Yeu Wu (VLSI-DAT, 2017)

Path-Diversity-Aware Fault-Tolerant Routing Algorithm for Network-on-Chip Systems. - Yu-Yin Chen; En-Jui Chang; Hsien-Kai Hsin; Kun-Chih Jimmy Chen; An-Yeu Andy Wu (IEEE Trans. Parallel Distributed Syst., 2017)

Compressive Sensing (CS) Assisted Low-Complexity Beamspace Hybrid Precoding for Millimeter-Wave MIMO Systems. - Chiang-Hen Chen; Cheng-Rung Tsai; Yu-Hsin Liu; Wei-Lun Hung; An-Yeu Wu (IEEE Trans. Signal Process., 2017)

Low-Complexity Stochastic Gradient Pursuit Algorithm and Architecture for Robust Compressive Sensing Reconstruction. - Yu-Min Lin; Yi Chen; Nai-Shan Huang; An-Yeu Wu (IEEE Trans. Signal Process., 2017)

Variation-Aware Reliable Many-Core System Design by Exploiting Inherent Core Redundancy. - Huai-Ting Li; Ching-Yao Chou; Yuan-Ting Hsieh; Wei-Ching Chu; An-Yeu Wu (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Low-Complexity Compressed Analysis in Eigenspace with Limited Labeled Data for Real-Time Electrocardiography Telemonitoring. - Kai-Chieh Hsu; Bo-Hong Cho; Ching-Yao Chou; An-Yeu Andy Wu (GlobalSIP, 2018)

Polar Feature Based Deep Architectures for Automatic Modulation Classification Considering Channel Fading. - Chieh-Fang Teng; Ching-Chun Liao; Chun-Hsiang Chen; An-Yeu Andy Wu (GlobalSIP, 2018)

Low-Complexity Secure Watermark Encryption for Compressed Sensing-Based Privacy Preserving. - Kai-Ni Hou; Ting-Sheng Chen; Hung-Chi Kuo; Tzu-Hsuan Chen; An-Yeu Wu (ICASSP, 2018)

Entropy-Assisted Emotion Recognition of Valence and Arousal Using XGBoost Classifier. - Sheng-Hui Wang; Huai-Ting Li; En-Jui Chang; An-Yeu Andy Wu (AIAI, 2018)

Error-Resilient Reconfigurable Boosting Extreme Learning Machine for ECG Telemonitoring Systems. - Sheng-Hui Wang; Huai-Ting Li; An-Yeu Andy Wu (ISCAS, 2018)

A 232-to-1996KS/s robust compressive-sensing reconstruction engine for real-time physiological signals monitoring. - Ting-Sheng Chen; Hung-Chi Kuo; An-Yeu Wu (ISSCC, 2018)

Entropy-Assisted Multi-Modal Emotion Recognition Framework Based on Physiological Signals. - Kuan Tung; Po-Kang Liu; Yu-Chuan Chuang; Sheng-Hui Wang; An-Yeu Wu (CoRR, 2018)

Low-Complexity Privacy-Preserving Compressive Analysis Using Subspace-Based Dictionary for ECG Telemonitoring System. - Ching-Yao Chou; En-Jui Chang; Huai-Ting Li; An-Yeu Wu (IEEE Trans. Biomed. Circuits Syst., 2018)

Dynamically Updatable Ternary Segmented Aging Bloom Filter for OpenFlow-Compliant Low-Power Packet Processing. - Sheng-Chun Kao; Ding-Yuan Lee; Ting-Sheng Chen; An-Yeu Wu (IEEE/ACM Trans. Netw., 2018)

Efficient Compressive Channel Estimation for Millimeter-Wave Large-Scale Antenna Systems. - Cheng-Rung Tsai; Yu-Hsin Liu; An-Yeu Wu (IEEE Trans. Signal Process., 2018)

Structured Random Compressed Channel Sensing for Millimeter-Wave Large-Scale Antenna Systems. - Cheng-Rung Tsai; An-Yeu Wu (IEEE Trans. Signal Process., 2018)

Structural Scrambling of Circulant Matrices for Cost-effective Compressive Sensing. - Yu-Min Lin; Jie-Fang Zhang; Jing Geng; An-Yeu Andy Wu (J. Signal Process. Syst., 2018)

Hyperdimensional Computing-based Multimodality Emotion Recognition with Physiological Signals. - En-Jui Chang; Abbas Rahimi; Luca Benini; An-Yeu Andy Wu (AICAS, 2019)

Sparse Autoencoder with Attention Mechanism for Speech Emotion Recognition. - Ting-Wei Sun; An-Yeu Andy Wu (AICAS, 2019)

Entropy and Complexity Assisted EEG-based Mental Workload Assessment System. - Po-Kang Liu; Win-Ken Beh; Ching-Yen Shih; Yi-Ta Chen; An-Yeu Andy Wu (BioCAS, 2019)

Neural Network-based Equalizer by Utilizing Coding Gain in Advance. - Chieh-Fang Teng; Han-Mo Ou; An-Yeu Andy Wu (GlobalSIP, 2019)

Scattering Multi-connectivity Estimation for Indoor mmWave Small Cells under Limited Training Steps. - Hung-Yi Cheng; Ching-Chun Liao; An-Yeu Andy Wu (ICASSP, 2019)

Low-Complexity Compressive Analysis in Sub-Eigenspace for ECG Telemonitoring System. - Ching-Yao Chou; An-Yeu Andy Wu (ICASSP, 2019)

Low-complexity Recurrent Neural Network-based Polar Decoder with Weight Quantization Mechanism. - Chieh-Fang Teng; Chen-Hsi Derek Wu; Andrew Kuan-Shiuan Ho; An-Yeu Andy Wu (ICASSP, 2019)

AdaBoost-assisted Extreme Learning Machine for Efficient Online Sequential Classification. - Yi-Ta Chen; Yu-Chuan Chuang; An-Yeu Andy Wu (SiPS, 2019)

Co-Design of Sparse Coding and Dictionary Learning for Real-Time Physiological Signals Monitoring. - Kuan-Chun Chen; Ching-Yao Chou; An-Yeu Andy Wu (SiPS, 2019)

Feature Selection Framework for XGBoost Based on Electrodermal Activity in Stress Detection. - Cheng-Ping Hsieh; Yi-Ta Chen; Win-Ken Beh; An-Yeu Andy Wu (SiPS, 2019)

Unsupervised Learning for Neural Network-based Polar Decoder via Syndrome Loss. - Chieh-Fang Teng; An-Yeu Wu (CoRR, 2019)

A 232-1996-kS/s Robust Compressive Sensing Reconstruction Engine for Real-Time Physiological Signals Monitoring. - Ting-Sheng Chen; Hung-Chi Kuo; An-Yeu Wu (IEEE J. Solid State Circuits, 2019)

Robust and Lightweight Ensemble Extreme Learning Machine Engine Based on Eigenspace Domain for Compressed Learning. - Huai-Ting Li; Ching-Yao Chou; Yi-Ta Chen; Sheng-Hui Wang; An-Yeu Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Real-Time Multi-User Detection Engine Design for IoT Applications via Modified Sparsity Adaptive Matching Pursuit. - Ching-Chun Liao; Ting-Sheng Chen; An-Yeu Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Low-Complexity Compressed-Sensing-Based Watermark Cryptosystem and Circuits Implementation for Wireless Sensor Networks. - Ting-Sheng Chen; Kai-Ni Hou; Win-Ken Beh; An-Yeu Wu (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor. - Ding-Yuan Lee; Ching-Che Wang; An-Yeu Wu (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Joint Multi-Beam Training and Codebook Design for Indoor High-Throughput Transmissions Under Limited Training Steps. - Hung-Yi Cheng; Ching-Chun Liao; An-Yeu Andy Wu (IEEE Trans. Veh. Technol., 2019)

Online Extreme Learning Machine Design for the Application of Federated Learning. - Yi-Ta Chen; Yu-Chuan Chuang; An-Yeu Andy Wu (AICAS, 2020)

Explainable Deep Neural Network for Identifying Cardiac Abnormalities Using Class Activation Map. - Yu-Cheng Lin; Yun-Chieh Lee; Wen-Chiao Tsai; Win-Ken Beh; An-Yeu Andy Wu (CinC, 2020)

Low-Complexity LSTM-Assisted Bit-Flipping Algorithm For Successive Cancellation List Polar Decoder. - Chun-Hsiang Chen; Chieh-Fang Teng; An-Yeu Andy Wu (ICASSP, 2020)

Low-Complexity Compressed Alignment-Aided Compressive Analysis for Real-Time Electrocardiography Telemonitoring. - Yo-Woei Pua; Ching-Yao Chou; An-Yeu Andy Wu (ICASSP, 2020)

Task-Projected Hyperdimensional Computing for Multi-task Learning. - Cheng-Yang Chang; Yu-Chuan Chuang; An-Yeu Andy Wu (AIAI (1), 2020)

Weighted Pulse Decomposition Analysis of Fingertip Photoplethysmogram Signals for Blood Pressure Assessment. - Chiu-Hua Huang; Jia-Wei Guo 001; Yu-Chia Yang; Pei-Yun Tsai 001; An-Yeu Andy Wu; Hung-Ju Lin; Tzung-Dau Wang (ISCAS, 2020)

A Neural Network-Aided Viterbi Receiver for Joint Equalization and Decoding. - Han-Mo Ou; Chieh-Fang Teng; Wen-Chiao Tsai; An-Yeu Andy Wu (MLSP, 2020)

IP-HDC: Information-Preserved Hyperdimensional Computing for Multi-Task Learning. - Cheng-Yang Chang; Yu-Chuan Chuang; An-Yeu Andy Wu (SiPS, 2020)

Dynamic Hyperdimensional Computing for Improving Accuracy-Energy Efficiency Trade-Offs. - Yu-Chuan Chuang; Cheng-Yang Chang; An-Yeu Andy Wu (SiPS, 2020)

Neural Network-Aided BCJR Algorithm for Joint Symbol Detection and Channel Decoding. - Wen-Chiao Tsai; Chieh-Fang Teng; Han-Mo Ou; An-Yeu Andy Wu (SiPS, 2020)

ECG-Aided PPG Signal Quality Assessment (SQA) System for Heart Rate Estimation. - Yu-Chia Yang; Win-Ken Beh; Yi-Cheng Lo; An-Yeu Andy Wu; Shih-Jen Lu (SiPS, 2020)

An Ultra-Low Latency 7.8-13.6 pJ/b Reconfigurable Neural Network-Assisted Polar Decoder with Multi-Code Length Support. - Chieh-Fang Teng; Chun-Hsiang Chen; An-Yeu Andy Wu (VLSI Circuits, 2020)

Accumulated Polar Feature based Deep Learning with Channel Compensation Mechanism for Efficient Automatic Modulation Classification under Time varying Channels. - Chieh-Fang Teng; Ching-Yao Chou; Chun-Hsiang Chen; An-Yeu Wu (CoRR, 2020)

Compressed-Domain ECG-Based Biometric User Identification Using Compressive Analysis. - Ching-Yao Chou; Yo-Woei Pua; Ting-Wei Sun; An-Yeu Andy Wu (Sensors, 2020)

Low-Complexity On-Demand Reconstruction for Compressively Sensed Problematic Signals. - Ching-Yao Chou; Kai-Chieh Hsu; Bo-Hong Cho; Kuan-Chun Chen; An-Yeu Andy Wu (IEEE Trans. Signal Process., 2020)

Accumulated Polar Feature-Based Deep Learning for Efficient and Lightweight Automatic Modulation Classification With Channel Compensation Mechanism. - Chieh-Fang Teng; Ching-Yao Chou; Chun-Hsiang Chen; An-Yeu Wu (IEEE Trans. Veh. Technol., 2020)

FL-HDC: Hyperdimensional Computing Design for the Application of Federated Learning. - Cheng-Yen Hsieh; Yu-Chuan Chuang; An-Yeu Andy Wu (AICAS, 2021)

Convolutional Neural Network-Aided Bit-Flipping for Belief Propagation Decoding of Polar Codes. - Chieh-Fang Teng; Andrew Kuan-Shiuan Ho; Chen-Hsi Derek Wu; Sin-Sheng Wong; An-Yeu Andy Wu (ICASSP, 2021)

Hyperdimensional Computing with Learnable Projection for User Adaptation Framework. - Yu-Ren Hsiao; Yu-Chuan Chuang; Cheng-Yang Chang; An-Yeu Andy Wu (AIAI, 2021)

PQ-HDC: Projection-Based Quantization Scheme for Flexible and Efficient Hyperdimensional Computing. - Chi-Tse Huang; Cheng-Yang Chang; Yu-Chuan Chuang; An-Yeu Andy Wu (AIAI, 2021)

Scalable NPairLoss-Based Deep-ECG for ECG Verification. - Yu-Shan Tai; Yi-Ta Chen; An-Yeu Andy Wu (AIAI, 2021)

A Scalable Extreme Learning Machine (S-ELM) for Class-Incremental ECG-Based User Identification. - Cheng-Lin Lee; Yi-Ta Chen; An-Yeu Wu (ISCAS, 2021)

Efficient Mind-wandering Detection System with GSR Signals on MM-SART Database. - Sheng Chang; Yi-Ta Chen; An-Yeu Andy Wu (SiPS, 2021)

Two-Step Codebook-Assisted Alternating Minimization (CA-AltMin) for Low-Complexity Hybrid Beamforming Design. - Sin-Sheng Wong; Chieh-Fang Teng; An-Yeu Wu (IEEE Commun. Lett., 2021)

A Tri-Mode Compressed Analytics Engine for Low-Power AF Detection With On-Demand EKG Reconstruction. - Kuan-Chun Chen; Ching-Yao Chou; An-Yeu Wu (IEEE J. Solid State Circuits, 2021)

An Arbitrarily Reconfigurable Extreme Learning Machine Inference Engine for Robust ECG Anomaly Detection. - Yu-Chuan Chuang; Yi-Ta Chen; Huai-Ting Li; An-Yeu Andy Wu (IEEE Open J. Circuits Syst., 2021)

When Eyes Wander Around: Mind-Wandering as Revealed by Eye Movement Analysis with Hidden Markov Models. - Hsing-Hao Lee; Zih-Ling Chen; Su-Ling Yeh; Janet Hui-wen Hsiao; An-Yeu Andy Wu (Sensors, 2021)

Coherence between Decomposed Components of Wrist and Finger PPG Signals by Imputing Missing Features and Resolving Ambiguous Features. - Pei-Yun Tsai 001; Chiu-Hua Huang; Jia-Wei Guo 001; Yu-Chuan Li; An-Yeu Andy Wu; Hung-Ju Lin; Tzung-Dau Wang (Sensors, 2021)

MulTa-HDC: A Multi-Task Learning Framework For Hyperdimensional Computing. - Cheng-Yang Chang; Yu-Chuan Chuang; En-Jui Chang; An-Yeu Andy Wu (IEEE Trans. Computers, 2021)

A 7.8-13.6 pJ/b Ultra-Low Latency and Reconfigurable Neural Network-Assisted Polar Decoder With Multi-Code Length Support. - Chieh-Fang Teng; An-Yeu Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Convolutional Neural Network-Aided Tree-Based Bit-Flipping Framework for Polar Decoder Using Imitation Learning. - Chieh-Fang Teng; An-Yeu Andy Wu (IEEE Trans. Signal Process., 2021)

MAUS: A Dataset for Mental Workload Assessment on N-back task Using Wearable Sensor. - Win-Ken Beh; Yi-Hsuan Wu; An-Yeu Andy Wu (IEEE DataPort, 2021)

T-EAP: Trainable Energy-Aware Pruning for NVM-based Computing-in-Memory Architecture. - Cheng-Yang Chang; Yu-Chuan Chuang; Kuang-Chao Chou; An-Yeu Wu (AICAS, 2022)

Compression-Aware Projection with Greedy Dimension Reduction for Convolutional Neural Network Activations. - Yu-Shan Tai; Chieh-Fang Teng; Cheng-Yang Chang; An-Yeu Andy Wu (ICASSP, 2022)

Face Recognition for Fisheye Images. - Yi-Cheng Lo; Chiao-Chun Huang; Yueh-Feng Tsai; I-Chan Lo; An-Yeu Andy Wu; Homer H. Chen (ICIP, 2022)

Automated Quantization Range Mapping for DAC/ADC Non-linearity in Computing-In-Memory. - Chi-Tse Huang; Yu-Chuan Chuang; Ming-Guang Lin; An-Yeu Andy Wu (ISCAS, 2022)

C3-SL: Circular Convolution-Based Batch-Wise Compression for Communication-Efficient Split Learning. - Cheng-Yen Hsieh; Yu-Chuan Chuang; An-Yeu Wu (MLSP, 2022)

Learnable Mixed-precision and Dimension Reduction Co-design for Low-storage Activation. - Yu-Shan Tai; Cheng-Yang Chang; Chieh-Fang Teng; An-Yeu Andy Wu (SiPS, 2022)

D-NAT: Data-Driven Non-Ideality Aware Training Framework for Fabricated Computing-In-Memory Macros. - Ming-Guang Lin; Chi-Tse Huang; Yu-Chuan Chuang; Yi-Ta Chen; Ying-Tuan Hsu; Yu-Kai Chen; Jyun-Jhe Chou; Tsung-Te Liu; Chi-Sheng Shih 001; An-Yeu Wu (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)

Low-Complexity Two-Step Optimization in Active-IRS-Assisted Uplink NOMA Communication. - Chi-Wei Chen; Wen-Chiao Tsai; An-Yeu Wu (IEEE Commun. Lett., 2022)

Low-Complexity Compressive Channel Estimation for IRS-Aided mmWave Systems With Hypernetwork-Assisted LAMP Network. - Wen-Chiao Tsai; Chi-Wei Chen; Chieh-Fang Teng; An-Yeu Wu (IEEE Commun. Lett., 2022)

An Effective Entropy-Assisted Mind-Wandering Detection System Using EEG Signals of MM-SART Database. - Yi-Ta Chen; Hsing-Hao Lee; Ching-Yen Shih; Zih-Ling Chen; Win-Ken Beh; Su-Ling Yeh; An-Yeu Wu (IEEE J. Biomed. Health Informatics, 2022)

WMMSE-Based Alternating Optimization for Low-Complexity Multi-IRS MIMO Communication. - Chi-Wei Chen; Wen-Chiao Tsai; Sin-Sheng Wong; Chieh-Fang Teng; An-Yeu Wu (IEEE Trans. Veh. Technol., 2022)

Mitigating Non-ideality Issues of Analog Computing-In-Memory in DNN-based designs. - Chi-Tse Huang; An-Yeu Andy Wu (ASICON, 2023)

BWA-NIMC: Budget-based Workload Allocation for Hybrid Near/In-Memory-Computing. - Chi-Tse Huang; Cheng-Yang Chang; Yu-Chuan Chuang; An-Yeu Andy Wu (DAC, 2023)

TSPTQ-ViT: Two-Scaled Post-Training Quantization for Vision Transformer. - Yu-Shan Tai; Ming-Guang Lin; An-Yeu Andy Wu (ICASSP, 2023)

Compressive Channel Estimation for IRS-Aided Millimeter-Wave Systems via Two-Stage Lamp Network. - Wen-Chiao Tsai; Chi-Wei Chen; An-Yeu Andy Wu (ICASSP, 2023)

H-RIS: Hybrid Computing-in-Memory Architecture Exploring Repetitive Input Sharing. - Yu-Chen Chen; Cheng-Yang Chang; An-Yeu Wu (ISCAS, 2023)

Trainable Policy For The On-Demand Offloading On Edge-Cloud Collaborative System. - Cheng-Lin Hsieh; Yi-Cheng Lo; An-Yeu Andy Wu (MLSP, 2023)

Constraints-Aware Trainable Pruning With System Optimization For The On-Demand Offloading Edge-Cloud Collaborative System. - Yi-Cheng Lo; Cheng-Lin Hsieh; An-Yeu Andy Wu (MLSP, 2023)

DE-C3: Dynamic Energy-Aware Compression for Computing-In-Memory-Based Convolutional Neural Network Acceleration. - Guan-Wei Wu; Cheng-Yang Chang; An-Yeu Andy Wu (SOCC, 2023)

DEA-NIMC: Dynamic Energy-Aware Policy for Near/In-Memory Computing Hybrid Architecture. - Yu-Cheng Wu; Chi-Tse Huang; An-Yeu Andy Wu (SOCC, 2023)

Hybrid Active-Passive IRS-Assisted Framework in Uplink NOMA Communication. - Chi-Wei Chen; Wen-Chiao Tsai; An-Yeu Andy Wu (SPAWC, 2023)

S-QRD-ELM: Scalable QR-Decomposition-Based Extreme Learning Machine Engine Supporting Online Class-Incremental Learning for ECG-Based User Identification. - Yi-Ta Chen; Yu-Chuan Chuang; Li-Sheng Chang; An-Yeu Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

E-UPQ: Energy-Aware Unified Pruning-Quantization Framework for CIM Architecture. - Cheng-Yang Chang; Kuang-Chao Chou; Yu-Chuan Chuang; An-Yeu Wu (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

Recent Progress and Development of Hyperdimensional Computing (HDC) for Edge Intelligence. - Cheng-Yang Chang; Yu-Chuan Chuang; Chi-Tse Huang; An-Yeu Wu (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

Machine-aided PPG Signal Quality Assessment (SQA) for Multi-mode Physiological Signal Monitoring. - Win-Ken Beh; Yu-Chia Yang; Yi-Cheng Lo; Yun-Chieh Lee; An-Yeu Andy Wu (ACM Trans. Comput. Heal., 2023)

Robust PPG-Based Mental Workload Assessment System Using Wearable Devices. - Win-Ken Beh; Yi-Hsuan Wu; An-Yeu Wu (IEEE J. Biomed. Health Informatics, 2023)

Noise-Level Aware Compressed Analysis Framework for Robust Electrocardiography Signal Monitoring. - Yi-Cheng Lo; Win-Ken Beh; Chiao-Chun Huang; An-Yeu Wu (IEEE J. Biomed. Health Informatics, 2023)

Joint Optimization of Dimension Reduction and Mixed-Precision Quantization for Activation Compression of Neural Networks. - Yu-Shan Tai; Cheng-Yang Chang; Chieh-Fang Teng; Yi-Ta Chen; An-Yeu Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Dynamic-HDC: A Two-Stage Dynamic Inference Framework for Brain-Inspired Hyperdimensional Computing. - Yu-Chuan Chuang; Cheng-Yang Chang; An-Yeu Wu (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

Approximate Adder Tree Design with Sparsity-Aware Encoding and In-Memory Swapping for SRAM-based Digital Compute-In-Memory Macros. - Ming-Guang Lin; Jiing-Ping Wang; Cheng-Yang Chang; An-Yeu Andy Wu (AICAS, 2024)

An Efficient Anomalous Sound Detection by Robust Processing and Reformation of Objective. - Tsung-Lin Tsai; Yi-Cheng Lo; An-Yeu Andy Wu (AICAS, 2024)

LATTE: Low-Precision Approximate Attention with Head-wise Trainable Threshold for Efficient Transformer. - Jiing-Ping Wang; Ming-Guang Lin; An-Yeu Andy Wu (AICAS, 2024)

DIET-PIM: Dynamic Importance-based Early Termination for Energy-Efficient Processing-in-Memory Accelerator. - Cheng-Yang Chang; Chi-Tse Huang; An-Yeu Andy Wu (APCCAS, 2024)

A 28nm 64.5TOPS/W Sparse Transformer Accelerator with Partial Product-based Speculation and Sparsity-Adaptive Computation. - Ming-Guang Lin; Jiing-Ping Wang; Yuan-June Luo; An-Yeu Andy Wu (APCCAS, 2024)

Memory-Oriented Structural Pruning for Anomalous Sound Detection System on Microcontrollers. - Chieh-Wen Yang; Yi-Cheng Lo; Tsung-Lin Tsai; An-Yeu Andy Wu (APCCAS, 2024)

BFP-CIM: Data-Free Quantization with Dynamic Block-Floating-Point Arithmetic for Energy-Efficient Computing-In-Memory-based Accelerator. - Cheng-Yang Chang; Chi-Tse Huang; Yu-Chuan Chuang; Kuang-Chao Chou; An-Yeu Andy Wu (ASPDAC, 2024)

BORE: Energy-Efficient Banded Vector Similarity Search with Optimized Range Encoding for Memory-Augmented Neural Network. - Chi-Tse Huang; Cheng-Yang Chang; Hsiang-Yun Cheng; An-Yeu Wu (DATE, 2024)

A 40nm 24.6TOPS/W Scalable EfficientDet Processor for Object Detection. - Yu-Chuan Chuang; Ming-Guang Lin; Chi-Tse Huang; Chieh-Fang Teng; Cheng-Yang Chang; Yi-Ta Chen; An-Yeu Andy Wu (ISCAS, 2024)

Similarity-Aware Fast Low-Rank Decomposition Framework for Vision Transformers. - Yuan-June Luo; Yu-Shan Tai; Ming-Guang Lin; An-Yeu Andy Wu (ISCAS, 2024)

Retraining-free Constraint-aware Token Pruning for Vision Transformer on Edge Devices. - Yun-Chia Yu; Mao-Chi Weng; Ming-Guang Lin; An-Yeu Andy Wu (ISCAS, 2024)

FQ4DM: Full Quantization for Diffusion Model. - Chieh-En Wang; Yu-Shan Tai; An-Yeu Wu (MLSP, 2024)

MPTQ-ViT: Mixed-PrecisionPost-TrainingQuantizationforVisionTransformer. - Yu-Shan Tai; An-Yeu Wu (CoRR, 2024)

Enhanced-GNN With Angular CSI for Beamforming Design in IRS-Assisted mmWave Communication Systems. - Ting-Ju Yeh; Wen-Chiao Tsai; Chi-Wei Chen; An-Yeu Wu (IEEE Commun. Lett., 2024)

BFP-CIM: Runtime Energy-Accuracy Scalable Computing-in-Memory-Based DNN Accelerator Using Dynamic Block-Floating-Point Arithmetic. - Cheng-Yang Chang; Chi-Tse Huang; Yu-Chuan Chuang; Kuang-Chao Chou; An-Yeu Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Quality-Aware Signal Processing Mechanism of PPG Signal for Long-Term Heart Rate Monitoring. - Win-Ken Beh; Yu-Chia Yang; An-Yeu Wu (Sensors, 2024)

Deep Unfolding-Based Channel Estimation for IRS-Aided mmWave Systems via Two-Stage LAMP Network With Row Compression. - Wen-Chiao Tsai; Chi-Wei Chen; An-Yeu Wu (IEEE Trans. Veh. Technol., 2024)

Efficient and Reliable Vector Similarity Search Using Asymmetric Encoding with NAND-Flash for Many-Class Few-Shot Learning. - Hao-Wei Chiang; Chi-Tse Huang; Hsiang-Yun Cheng; Po-Hao Tseng; Ming-Hsiu Lee; An-Yeu Andy Wu (ASP-DAC, 2025)

Deep Unfolding WMMSE Algorithm and Architecture Co-design for Relay-assisted Carrier Aggregation and MU-MIMO Systems. - Chi-Wei Chen; Shu-Kae Liu; An-Yeu Andy Wu (ISCAS, 2025)

WS-CIM: Enabling Fast and Simultaneous Update for Multi-Macro Compute-in-Memory Architecture Using Weight Sharing Technique. - Yan-Ding Shieh; Ming-Guang Lin; Hung-Yu Wang; An-Yeu Andy Wu (ISCAS, 2025)

PAT-ViT: Token Pruning-based Adversarial Tuning for Robust Vision Transformers. - Yun-Hao Yang; Yuan-June Luo; Wan-Jung Chen; An-Yeu Andy Wu; Shih-Hsu Huang; Mladen Berekovic (ISCAS, 2025)

AMP-ViT: Optimizing Vision Transformer Efficiency with Adaptive Mixed-Precision Post-Training Quantization. - Yu-Shan Tai; An-Yeu Andy Wu (WACV, 2025)

EECS: Efficient End-Cloud Collaborative System With On-Demand Offloading Mechanism for Convolutional Neural Network. - Yi-Cheng Lo; Cheng-Lin Hsieh; Hao-Wei Chiang; An-Yeu Wu (IEEE Internet Things J., 2025)

Relay-Assisted Carrier Aggregation (RACA) Uplink System for Enhancing Data Rate of Extended Reality (XR). - Chi-Wei Chen; Wen-Chiao Tsai; Lung-Sheng Tsai; An-Yeu Wu (IEEE Trans. Veh. Technol., 2025)

Quick Bypass Mechanism of Zero-Shot Diffusion-Based Image Restoration. - Yu-Shan Tai; An-Yeu Wu (CoRR, 2025)