Modeling the Runtime Integrity of Cloud Servers: A Scoped Invariant Perspective. - Jinpeng Wei; Calton Pu; Carlos V. Rozas; Anand Rajan; Feng Zhu 015 (CloudCom, 2010)

Silicon PUFs in Practice. - Patrick Koeberl; Jiangtao Li 001; Anand Rajan; Claire Vishik (ISSE, 2010)

An Anonymous Attestation Scheme with Optional Traceability. - Jiangtao Li 001; Anand Rajan (TRUST, 2010)

Defining trust evidence: research directions. - Claire Vishik; Anand Rajan; Chris Ramming; David Grawrock; Jesse Walker (CSIIRW, 2011)

Client-based authentication technology: user-centric authentication using secure containers. - Conor P. Cahill; Jason Martin; Matthew W. Pagano; Vinay Phegade; Anand Rajan (Digital Identity Management, 2011)

Evaluation of a PUF Device Authentication Scheme on a Discrete 0.13um SRAM. - Patrick Koeberl; Jiangtao Li 001; Roel Maes; Anand Rajan; Claire Vishik; Marcin Wójcik (INTRUST, 2011)

A Practical Device Authentication Scheme Using SRAM PUFs. - Patrick Koeberl; Jiangtao Li 001; Anand Rajan; Claire Vishik; Wei Wu 024 (TRUST, 2011)

A practical device authentication scheme using SRAM PUFs. - Patrick Koeberl; Jiangtao Li 001; Roel Maes; Anand Rajan; Claire Vishik; Marcin Wójcik; Wei Wu 024 (J. Cryptogr. Eng., 2012)

Entropy loss in PUF-based key generation schemes: The repetition code pitfall. - Patrick Koeberl; Jiangtao Li 001; Anand Rajan; Wei Wu 024 (HOST, 2014)

Mobile Trusted Computing. - N. Asokan; Jan-Erik Ekberg; Kari Kostiainen; Anand Rajan; Carlos V. Rozas; Ahmad-Reza Sadeghi; Steffen Schulz 001; Christian Wachsmann (Proc. IEEE, 2014)

Trust Evidence for IoT: Trust Establishment from Servers to Sensors. - David Ott; Claire Vishik; David Grawrock; Anand Rajan (ISSE, 2015)

Time to Rethink: Trust Brokerage Using Trusted Execution Environments. - Patrick Koeberl; Vinay Phegade; Anand Rajan; Thomas Schneider 003; Steffen Schulz 001; Maria Zhdanova (TRUST, 2015)

An integrated inductive VR with a 250MHz all-digital multisampled compensator and on-chip auto-tuning of coefficients in 130nm CMOS. - Monodeep Kar; Arvind Singh; Anand Rajan; Vivek De; Saibal Mukhopadhyay (ESSCIRC, 2016)

Integrated all-digital low-dropout regulator as a countermeasure to power attack in encryption engines. - Arvind Singh; Monodeep Kar; Anand Rajan; Vivek De; Saibal Mukhopadhyay (HOST, 2016)

What does ultra low power requirements mean for side-channel secure cryptography? - Monodeep Kar; Arvind Singh; Anand Rajan; Vivek De; Saibal Mukhopadhyay (ICCD, 2016)

Exploiting Fully Integrated Inductive Voltage Regulators to Improve Side Channel Resistance of Encryption Engines. - Monodeep Kar; Arvind Singh; Sanu Mathew; Anand Rajan; Vivek De; Saibal Mukhopadhyay (ISLPED, 2016)

Improved power side channel attack resistance of a 128-bit AES engine with random fast voltage dithering. - Arvind Singh; Monodeep Kar; Sanu Mathew; Anand Rajan; Vivek De; Saibal Mukhopadhyay (ESSCIRC, 2017)

Invited paper: Low power requirements and side-channel protection of encryption engines: Challenges and opportunities. - Monodeep Kar; Arvind Singh; Sanu Mathew; Anand Rajan; Vivek De; Saibal Mukhopadhyay (ISLPED, 2017)

8.1 Improved power-side-channel-attack resistance of an AES-128 core via a security-aware integrated buck voltage regulator. - Monodeep Kar; Arvind Singh; Sanu Mathew; Anand Rajan; Vivek De; Saibal Mukhopadhyay (ISSCC, 2017)

Reducing Side-Channel Leakage of Encryption Engines Using Integrated Low-Dropout Voltage Regulators. - Arvind Singh; Monodeep Kar; Sanu Mathew; Anand Rajan; Vivek De; Saibal Mukhopadhyay (J. Hardw. Syst. Secur., 2017)

An All-Digital Fully Integrated Inductive Buck Regulator With A 250-MHz Multi-Sampled Compensator and a Lightweight Auto-Tuner in 130-nm CMOS. - Monodeep Kar; Arvind Singh; Anand Rajan; Vivek De; Saibal Mukhopadhyay (IEEE J. Solid State Circuits, 2017)

Exploiting on-chip power management for side-channel security. - Arvind Singh; Monodeep Kar; Sanu Mathew; Anand Rajan; Vivek De; Saibal Mukhopadhyay (DATE, 2018)

Blindsight: Blinding EM Side-Channel Leakage using Built-In Fully Integrated Inductive Voltage Regulator. - Monodeep Kar; Arvind Singh; Sanu Mathew; Santosh Ghosh; Anand Rajan; Vivek De; Raheem A. Beyah; Saibal Mukhopadhyay (CoRR, 2018)

Reducing Power Side-Channel Information Leakage of AES Engines Using Fully Integrated Inductive Voltage Regulator. - Monodeep Kar; Arvind Singh; Sanu K. Mathew; Anand Rajan; Vivek De; Saibal Mukhopadhyay (IEEE J. Solid State Circuits, 2018)

A 128b AES Engine with Higher Resistance to Power and Electromagnetic Side-Channel Attacks Enabled by a Security-Aware Integrated All-Digital Low-Dropout Regulator. - Arvind Singh; Monodeep Kar; Sanu Mathew; Anand Rajan; Vivek De; Saibal Mukhopadhyay (ISSCC, 2019)

Improved Power/EM Side-Channel Attack Resistance of 128-Bit AES Engines With Random Fast Voltage Dithering. - Arvind Singh; Monodeep Kar; Sanu K. Mathew; Anand Rajan; Vivek De; Saibal Mukhopadhyay (IEEE J. Solid State Circuits, 2019)

Trustworthy AI Inference Systems: An Industry Research View. - Rosario Cammarota; Matthias Schunter; Anand Rajan; Fabian Boemer; Ágnes Kiss; Amos Treiber; Christian Weinert; Thomas Schneider 003; Emmanuel Stapf; Ahmad-Reza Sadeghi; Daniel Demmler; Huili Chen; et al. (CoRR, 2020)

Enhanced Power and Electromagnetic SCA Resistance of Encryption Engines via a Security-Aware Integrated All-Digital LDO. - Arvind Singh; Monodeep Kar; Venkata Chaitanya Krishna Chekuri; Sanu K. Mathew; Anand Rajan; Vivek De; Saibal Mukhopadhyay (IEEE J. Solid State Circuits, 2020)

Multi-scale Deep Learning Architecture for Nucleus Detection in Renal Cell Carcinoma Microscopy Image. - Shiba Kuanar; Vassilis Athitsos; Dwarikanath Mahapatra; Anand Rajan (CoRR, 2021)