A low-cost, 300-MHz, RISC CPU with attached media processor. - Sribalan Santhanam; Allen J. Baum; David Bertucci; Mike Braganza; Kevin Broch; Todd Broch; James Burnette; Edward Chang; Kwong-Tak Chui; Dan Dobberpuhl; Paul M. Donahue; Joel Grodstein; et al. (IEEE J. Solid State Circuits, 1998)

A 16-Core RISC Microprocessor with Network Extensions. - Vishnu Yalala; Derek Brasili; David Carlson; Adam Hughes; Anil Jain; Tim Kiszely; Kolar Kodandapani; Anand Varadharajan; Thucydides Xanthopoulos (ISSCC, 2006)

A 32-core RISC microprocessor with network accelerators, power management and testability features. - Brian Miller; Derek Brasili; Tim Kiszely; Rob Kuhn; Rahul Mehrotra; Manan Salvi; Mandar Kulkarni; Anand Varadharajan; Shi-Huang Yin; William Lin; Adam Hughes; Bill Stysiack; et al. (ISSCC, 2012)