Parallel Parameter Tuning for Applications with Performance Variability. - Vahid Tabatabaee; Ananta Tiwari; Jeffrey K. Hollingsworth (SC, 2005)

A scalable auto-tuning framework for compiler optimization. - Ananta Tiwari; Chun Chen 002; Jacqueline Chame; Mary W. Hall; Jeffrey K. Hollingsworth (IPDPS, 2009)

Tuning parallel applications in parallel. - Ananta Tiwari; Vahid Tabatabaee; Jeffrey K. Hollingsworth (Parallel Comput., 2009)

Auto-tuning for Energy Usage in Scientific Applications. - Ananta Tiwari; Michael Laurenzano; Laura Carrington; Allan Snavely (Euro-Par Workshops (2), 2011)

Online Adaptive Code Generation and Tuning. - Ananta Tiwari; Jeffrey K. Hollingsworth (IPDPS, 2011)

Auto-tuning full applications: A case study. - Ananta Tiwari; Jeffrey K. Hollingsworth; Chun Chen 002; Mary W. Hall; Chunhua Liao; Daniel J. Quinlan; Jacqueline Chame (Int. J. High Perform. Comput. Appl., 2011)

Tuning Parallel Applications in Parallel. - Ananta Tiwari (2011)

Green Queue: Customized Large-Scale Clock Frequency Scaling. - Ananta Tiwari; Michael Laurenzano; Joshua Peraza; Laura Carrington; Allan Snavely (CGC, 2012)

Modeling Power and Energy Usage of HPC Kernels. - Ananta Tiwari; Michael Laurenzano; Laura Carrington; Allan Snavely (IPDPS Workshops, 2012)

A Static Binary Instrumentation Threading Model for Fast Memory Trace Collection. - Michael Laurenzano; Joshua Peraza; Laura Carrington; Ananta Tiwari; William A. Ward Jr.; Roy L. Campbell (SC Companion, 2012)

Efficient HPC Data Motion via Scratchpad Memory. - Kayla O. Seager; Ananta Tiwari; Michael Laurenzano; Joshua Peraza; Pietro Cicotti; Laura Carrington (SC Companion, 2012)

Understanding the performance of stencil computations on Intel's Xeon Phi. - Joshua Peraza; Ananta Tiwari; Michael Laurenzano; Laura Carrington; William A. Ward Jr.; Roy L. Campbell (CLUSTER, 2013)

Inferring Large-Scale Computation Behavior via Trace Extrapolation. - Laura Carrington; Michael Laurenzano; Ananta Tiwari (IPDPS Workshops, 2013)

Multi Objective Optimization of HPC Kernels for Performance, Power, and Energy. - Prasanna Balaprakash; Ananta Tiwari; Stefan M. Wild (PMBS@SC, 2013)

Enabling fair pricing on HPC systems with node sharing. - Alex D. Breslow; Ananta Tiwari; Martin Schulz 001; Laura Carrington; Lingjia Tang; Jason Mars (SC, 2013)

Characterizing Large-Scale HPC Applications through Trace extrapolation. - Laura Carrington; Michael Laurenzano; Ananta Tiwari (Parallel Process. Lett., 2013)

Efficient speed (ES): Adaptive DVFS and clock modulation for energy efficiency. - Pietro Cicotti; Ananta Tiwari; Laura Carrington (CLUSTER, 2014)

Characterizing the Performance-Energy Tradeoff of Small ARM Cores in HPC Computation. - Michael A. Laurenzano; Ananta Tiwari; Adam Jundt; Joshua Peraza; William A. Ward Jr.; Roy L. Campbell; Laura Carrington (Euro-Par, 2014)

Modeling the Impact of Reduced Memory Bandwidth on HPC Applications. - Ananta Tiwari; Anthony Gamst; Michael A. Laurenzano; Martin Schulz 001; Laura Carrington (Euro-Par, 2014)

Enabling fair pricing on high performance computer systems with node sharing. - Alex D. Breslow; Ananta Tiwari; Martin Schulz 001; Laura Carrington; Lingjia Tang; Jason Mars (Sci. Program., 2014)

Making the Most of SMT in HPC: System- and Application-Level Perspectives. - Leo Porter 001; Michael A. Laurenzano; Ananta Tiwari; Adam Jundt; William A. Ward Jr.; Roy L. Campbell; Laura Carrington (ACM Trans. Archit. Code Optim., 2014)

VecMeter: Measuring Vectorization on the Xeon Phi. - Joshua Peraza; Ananta Tiwari; William A. Ward Jr.; Roy L. Campbell; Laura Carrington (CLUSTER, 2015)

Building Blocks for a System-Wide Power and Thermal Management Framework. - Ananta Tiwari; Adam Jundt; William A. Ward Jr.; Roy L. Campbell; Laura Carrington (ICPADS, 2015)

Predicting Optimal Power Allocation for CPU and DRAM Domains. - Ananta Tiwari; Martin Schulz 001; Laura Carrington (IPDPS Workshops, 2015)

Compute bottlenecks on the new 64-bit ARM. - Adam Jundt; Allyson Cauble-Chantrenne; Ananta Tiwari; Joshua Peraza; Michael A. Laurenzano; Laura Carrington (E2SC@SC, 2015)

Performance and energy efficiency analysis of 64-bit ARM using GAMESS. - Ananta Tiwari; Kristopher Keipert; Adam Jundt; Joshua Peraza; Sarom S. Leang; Michael Laurenzano; Mark S. Gordon; Laura Carrington (Co-HPC@SC, 2015)

Optimizing codes on the Xeon Phi: a case-study with LAMMPS. - Adam Jundt; Ananta Tiwari; William A. Ward Jr.; Roy L. Campbell; Laura Carrington (XSEDE, 2015)

PEBIL: binary instrumentation for practical data-intensive program analysis. - Michael A. Laurenzano; Joshua Peraza; Laura Carrington; Ananta Tiwari; William A. Ward Jr.; Roy L. Campbell (Clust. Comput., 2015)

Characterization and bottleneck analysis of a 64-bit ARMv8 platform. - Michael A. Laurenzano; Ananta Tiwari; Allyson Cauble-Chantrenne; Adam Jundt; William A. Ward Jr.; Roy L. Campbell; Laura Carrington (ISPASS, 2016)

AutoMOMML: Automatic Multi-objective Modeling with Machine Learning. - Prasanna Balaprakash; Ananta Tiwari; Stefan M. Wild; Laura Carrington; Paul D. Hovland (ISC, 2016)

The case for colocation of high performance computing workloads. - Alex D. Breslow; Leo Porter 001; Ananta Tiwari; Michael Laurenzano; Laura Carrington; Dean M. Tullsen; Allan Snavely (Concurr. Comput. Pract. Exp., 2016)

PMaC's green queue: a framework for selecting energy optimal DVFS configurations in large scale MPI applications. - Joshua Peraza; Ananta Tiwari; Michael Laurenzano; Laura Carrington; Allan Snavely (Concurr. Comput. Pract. Exp., 2016)