VL-CDRAM: variable line sized cached DRAMs. - Ananth Hegde; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (CODES+ISSS, 2003)

ChipPower: an architecture-level leakage simulator. - Yuh-Fang Tsai; Ananth Hegde Ankadi; Narayanan Vijaykrishnan; Mary Jane Irwin; Theocharis Theocharides (SoCC, 2004)