Processor Array for Signal Computing and Numerical Applications. - Juri Kanevski; Oleg Maslennikov; Anatoli Sergyienko (Parcella, 1996)

A Method for Mapping DSP Algorithms into Application Specific Structures. - Anatoli Sergyienko; Juri Kanevski; Oleg Maslennikov; Roman Wyrzykowski (EUROMICRO, 1998)

Implementation of Givens QR-Decomposition in FPGA. - Anatoli Sergyienko; Oleg Maslennikov (PPAM, 2001)

Configurable Microcontroller Array. - Oleg Maslennikov; Juri Shevtshenko; Anatoli Sergyienko (PARELEC, 2002)

Configurable Microprocessor Array for DSP Applications. - Oleg Maslennikow; Juri Shevtshenko; Anatoli Sergyienko (PPAM, 2003)

FPGA Implementation of the Conjugate Gradient Method. - Oleg Maslennikow; Volodymyr Lepekha; Anatoli Sergyienko (PPAM, 2005)

Mapping DSP Algorithms into FPGA. - Oleg Maslennikow; Anatoli Sergyienko (PARELEC, 2006)

Parallel Implementation of Cholesky LLT-Algorithm in FPGA-Based Processor. - Oleg Maslennikow; Volodymyr Lepekha; Anatoli Sergyienko; Adam Tomas; Roman Wyrzykowski (PPAM, 2007)

Application Specific Processors for the Autoregressive Signal Analysis. - Anatolij Sergiyenko; Oleg Maslennikow; Piotr Ratuszniak; Natalia Maslennikowa; Adam Tomas (PPAM (1), 2009)

Modules for Pipelined Mixed Radix FFT Processors. - Anatolij Sergiyenko; Anastasia Serhienko (Int. J. Reconfigurable Comput., 2016)