High-Performance BLS12-381 Pairing Engine on FPGA. - Anawin Opasatian; Makoto Ikeda (ASICON, 2023)

Lookup Table Modular Reduction: A Low-Latency Modular Reduction for Fast ECC Processor. - Anawin Opasatian; Makoto Ikeda (COOL CHIPS, 2023)

Manipulated Lookup Table Method for Efficient High-Performance Modular Multiplier. - Anawin Opasatian; Makoto Ikeda (IEEE Trans. Very Large Scale Integr. Syst., 2025)