ipPROCESS: Using a Process to Teach IP-Core Development. - Marília Lima; Andre Aziz; Diogo José Costa Alves; Patricia Lira; Vítor Schwambach; Edna Barros (MSE, 2005)

HdSC: a fast and preemptive modeling for on host HdS development. - Bruno O. Prado; Edna Barros; Thiago Figueiredo; Andre Aziz (SBCCI, 2011)

Communication software synthesis from UML-ESL models. - Thiago N. C. Cardoso; Edna Barros; Bruno O. Prado; Andre Aziz (SBCCI, 2012)

Balanced Prefetching Aggressiveness Controller for NoC-based Multiprocessor. - Andre Aziz; Maria Cireno; Edna Barros; Bruno O. Prado (SBCCI, 2014)

Temporized data prefetching algorithm for NoC-based multiprocessor systems. - Maria Cireno; Andre Aziz; Edna Barros (ASAP, 2016)

A MPSoC cache design space exploration approach based on ABC algorithm to optimize energy consumption and performance. - Marcus Vinicius Duarte dos Santos; Edna Barros; Andre Aziz (ASAP, 2016)