A 3bit/cell 32Gb NAND flash memory at 34nm with 6MB/s program throughput and with dynamic 2b/cell blocks configuration mode for a program throughput increase up to 13MB/s. - G. G. Marotta; Agostino Macerola; Andrea D'Alessandro; A. Torsi; C. Cerafogli; C. Lattaro; C. Musilli; D. Rivers; Emanuele Sirizotti; F. Paolini; G. Imondi; G. Naso; et al. (ISSCC, 2010)

A 128Gb 3b/cell NAND flash design using 20nm planar-cell technology. - Giovanni Naso; L. Botticchio; M. Castelli; C. Cerafogli; M. Cichocki; P. Conenna; Andrea D'Alessandro; Luca De Santis; Domenico Di Cicco; W. Di Francesco; M. L. Gallese; Girolamo Gallo; et al. (ISSCC, 2013)

19.1 A 128Gb MLC NAND-Flash device using 16nm planar cell. - Mark Helm; Jae-Kwan Park; Ali Ghalam; Jason Guo; Chang-Wan Ha; Cairong Hu; Heonwook Kim; Kalyan Kavalipurapu; Eric Lee; Ali Mohammadzadeh; Dan Nguyen; Vipul Patel; et al. (ISSCC, 2014)

13.7 A 1Tb Density 3b/Cell 3D-NAND Flash on a 2YY-Tier Technology with a 300MB/s Write Throughput. - Koichi Kawai; Yuichi Einaga; Yoko Oikawa; Yankang He; Biagio Iorio; Shigekazu Yamada; Yoshihiko Kamata; Tomoko Iwasaki; Andrea D'Alessandro; Erwin Yu; Arvind Muralidharan; Qinge Li; et al. (ISSCC, 2024)