FPGA implementation of a demux based on a multirate filter bank. - Marco Re; Gian Carlo Cardarilli; Andrea Del Re; Roberto Lojacono (ISCAS, 2000)

Power characterization of digital filters implemented on FPGA. - Gian Carlo Cardarilli; Andrea Del Re; Alberto Nannarelli; Marco Re (ISCAS (5), 2002)

Efficient Implementation of a Demultiplexer Based on a Multirate Filter Bank for the Skyplex Satellites DVB System. - Marco Re; Andrea Del Re; Gian Carlo Cardarilli (VLSI Design, 2002)

IP based reconfigurable digital platform for satellite communications. - Gian Carlo Cardarilli; Andrea Del Re; Marco Re (ISCAS (2), 2003)

A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters. - Andrea Del Re; Alberto Nannarelli; Marco Re (DATE, 2004)

Low-power implementation of polyphase filters in Quadratic Residue Number system. - Gian Carlo Cardarilli; Andrea Del Re; Alberto Nannarelli; Marco Re (ISCAS (2), 2004)

FPGA implementation of a general purpose HMM processor based on token passing algorithm. - D. Bianchi; Gian Carlo Cardarilli; Andrea Del Re; A. Malatesta; Marco Re (ECCTD, 2005)

Programmable power-of-two RNS scaler and its application to a QRNS polyphase filter. - Gian Carlo Cardarilli; Andrea Del Re; Alberto Nannarelli; Marco Re (ISCAS (2), 2005)

Optimized QPSK modulator for DVB-S applications. - Gian Carlo Cardarilli; Andrea Del Re; Marco Re; Lorenzo Simone (ISCAS, 2006)

Low-power adaptive filter based on RNS components. - G. L. Bernocchi; Gian Carlo Cardarilli; Andrea Del Re; Alberto Nannarelli; Marco Re (ISCAS, 2007)