Very low complexity prompted speaker verification system based on HMM-modeling. - Andrea Lodi 002; Mario Toma; Roberto Guerrieri (ICASSP, 2002)

Word endpoints detection in the presence of non-stationary noise. - Mario Toma; Andrea Lodi 002; Roberto Guerrieri (INTERSPEECH, 2002)

A pipelined configurable gate array for embedded processors. - Andrea Lodi 002; Mario Toma; Fabio Campi (FPGA, 2003)

A Reconfigurable Processor Architecture and Software Development Environment for Embedded Systems. - Fabio Campi; Andrea Cappelli; Roberto Guerrieri; Andrea Lodi 002; Mario Toma; Alberto La Rosa; Luciano Lavagno; Claudio Passerone; Roberto Canegallo (IPDPS, 2003)

A flexible LUT-based carry chain for FPGAs. - Andrea Lodi 002; Carlo Chiesa; Fabio Campi; Mario Toma (ISCAS (5), 2003)

A C-based algorithm development flow for a reconfigurable processor architecture. - Claudio Mucci; Carlo Chiesa; Andrea Lodi 002; Mario Toma; Fabio Campi (SoC, 2003)

Decoder-Based Multi-Context Interconnect Architecture. - Andrea Lodi 002; Luca Ciccarelli; Andrea Cappelli; Fabio Campi; Mario Toma (ISVLSI, 2003)

A VLIW processor with reconfigurable instruction set for embedded applications. - Andrea Lodi 002; Mario Toma; Fabio Campi; Andrea Cappelli; Roberto Canegallo; Roberto Guerrieri (IEEE J. Solid State Circuits, 2003)

A XiRisc-based SoC for embedded DSP applications. - Massimo Bocchi; Claudia De Bartolomeis; Claudio Mucci; Fabio Campi; Andrea Lodi 002; Mario Toma; Roberto Canegallo; Roberto Guerrieri (CICC, 2004)

Low leakage circuit design for FPGAs. - Luca Ciccarelli; Andrea Lodi 002; Roberto Canegallo (CICC, 2004)

A Dataflow Control Unit for C-to-Configurable Pipelines Compilation Flow. - Andrea Cappelli; Andrea Lodi 002; Claudio Mucci; Mario Toma; Fabio Campi (FCCM, 2004)

Routing architecture for multi-context FPGAs. - Andrea Lodi 002; Roberto Giansante; Carlo Chiesa; Luca Ciccarelli; Mario Toma; Fabio Campi (FPGA, 2004)

Compact Buffered Routing Architecture. - Andrea Lodi 002; Roberto Giansante; Carlo Chiesa; Luca Ciccarelli; Fabio Campi; Mario Toma (FPL, 2004)

Low leakage design of LUT-based FPGAs. - Andrea Lodi 002; Luca Ciccarelli; Domenico Loparco; Roberto Canegallo; Roberto Guerrieri (ESSCIRC, 2005)

An Embedded Reconfigurable Datapath for SoC. - Andrea Lodi 002; Luca Ciccarelli; Claudio Mucci; Roberto Giansante; Andrea Cappelli; Mario Toma (FCCM, 2005)

Combining low-leakage techniques for FPGA routing design. - Andrea Lodi 002; Luca Ciccarelli; Roberto Giansante (FPGA, 2005)

Design and implementation of a reconfigurable heterogeneous multiprocessor SoC. - Massimo Bocchi; Mario de Dominicis; Claudio Mucci; Antonio Deledda; Fabio Campi; Andrea Lodi 002; Mario Toma; Roberto Guerrieri (CICC, 2006)

A Low-Power Routing Architecture Optimized for Deep Sub-Micron FPGAs. - Luca Ciccarelli; Domenico Loparco; Massimiliano Innocenti; Andrea Lodi 002; Claudio Mucci; Pier Luigi Rolandi (CICC, 2006)

A Multi-Context Pipelined Array for Embedded Systems. - Andrea Lodi 002; Claudio Mucci; Massimo Bocchi; Andrea Cappelli; Mario de Dominicis; Luca Ciccarelli (FPL, 2006)

XiSystem: a XiRisc-based SoC with reconfigurable IO module. - Andrea Lodi 002; Andrea Cappelli; Massimo Bocchi; Claudio Mucci; Massimilano Innocenti; Claudia De Bartolomeis; Luca Ciccarelli; Roberto Giansante; Antonio Deledda; Fabio Campi; Mario Toma; Roberto Guerrieri (IEEE J. Solid State Circuits, 2006)

Low leakage techniques for FPGAs. - Andrea Lodi 002; Luca Ciccarelli; Roberto Guerrieri (IEEE J. Solid State Circuits, 2006)

A dynamically adaptive DSP for heterogeneous reconfigurable platforms. - Fabio Campi; Antonio Deledda; Matteo Pizzotti; Luca Ciccarelli; Pier Luigi Rolandi; Claudio Mucci; Andrea Lodi 002; Arseni Vitkovski; Luca Vanzolini (DATE, 2007)