High level synthesis through folding of data flow graphs: Optimal intra-node scheduling. - Anna Antola; Fausto Distante; Andrea Marchese (Microprocess. Microprogramming, 1993)

High level architectural synthesis: Precedence analysis and automatic cycle detection in data flow graphs. - Anna Antola; Fausto Distante; Andrea Marchese (Microprocess. Microprogramming, 1994)

Runtime resource management for embedded and HPC systems. - William Fornaciari; Gianmario Pozzi; Federico Reghenzani; Andrea Marchese; Mauro Belluschi (PARMA-DITAM@HiPEAC, 2016)

DENA: A DVFS-Capable Heterogeneous NoC Architecture. - Luca Cremona; William Fornaciari; Andrea Marchese; Michele Zanella; Davide Zoni (ISVLSI, 2017)

A Multimaterial Transport Problem and its Convex Relaxation via Rectifiable G-currents. - Andrea Marchese; Annalisa Massaccesi; Riccardo Tione (SIAM J. Math. Anal., 2019)