Yield Enhancement by Multi-level Linear Modeling of Non-Idealities in an Interpolated Flash ADCs. - Andrea Boni; Andrea Pierazzi (DFT, 1998)

Band-gap references for near 1-V operation in standard CMOS technology. - Andrea Pierazzi; Andrea Boni; Carlo Morandi (CICC, 2001)

A 10-b 185-MS/s track-and-hold in 0.35-μm CMOS. - Andrea Boni; Andrea Pierazzi; Carlo Morandi (IEEE J. Solid State Circuits, 2001)

LVDS I/O interface for Gb/s-per-pin operation in 0.35-μ/m CMOS. - Andrea Boni; Andrea Pierazzi; Davide Vecchi (IEEE J. Solid State Circuits, 2001)