Closing the parallel gap: a data structure architecture. - Andreas Böttcher (Oldenbourg, 1992)

Heuristics for the Design of Large Multipliers for FPGAs. - Andreas Böttcher; Keanu Kullmann; Martin Kumm (ARITH, 2020)

Resource Optimal Truncated Multipliers for FPGAs. - Andreas Böttcher; Martin Kumm; Florent de Dinechin (ARITH, 2021)

Resource Optimal Squarers for FPGAs. - Andreas Böttcher; Martin Kumm; Florent de Dinechin (FPL, 2022)

Towards Globally Optimal Design of Multipliers for FPGAs. - Andreas Böttcher; Martin Kumm (IEEE Trans. Computers, 2023)

Small Logic-based Multipliers with Incomplete Sub-Multipliers for FPGAs. - Andreas Böttcher; Martin Kumm (ARITH, 2024)

Multiplier Design Addressing Area-Delay Trade-offs by using DSP and Logic resources on FPGAs. - Andreas Böttcher; Martin Kumm (ASAP, 2024)