Reduced floating point for MPEG1/2 layer III decoding. - Mikael Olausson; Andreas Ehliar; Johan Eilert; Dake Liu (ICASSP (5), 2004)

Using low precision floating point numbers to reduce memory cost for MP3 decoding. - Johan Eilert; Andreas Ehliar; Dake Liu (MMSP, 2004)

Flexible route lookup using range search. - Andreas Ehliar; Dake Liu (Communications and Computer Networks, 2005)

An fpga based open source network-on-chip architecture. - Andreas Ehliar; Dake Liu (FPL, 2007)

A high performance microprocessor with DSP extensions optimized for the Virtex-4 FPGA. - Andreas Ehliar; Per Karlström; Dake Liu (FPL, 2008)

High-performance, low-latency field-programmable gate array-based floating-point adder and multiplier units in a Virtex 4. - Per Karlström; Andreas Ehliar; Dake Liu (IET Comput. Digit. Tech., 2008)

An ASIC perspective on FPGA optimizations. - Andreas Ehliar; Dake Liu (FPL, 2009)

Performance driven FPGA design with an ASIC perspective. - Andreas Ehliar (2009)

EBRAM - Extending the BlockRAMs in FPGAs to Support Caches and Hash Tables in an Efficient Manner. - Andreas Ehliar (FCCM, 2012)

Low-complexity general FIR filters based on Winograd's inner product algorithm. - Oscar Gustafsson; Andreas Ehliar (ISCAS, 2013)

Area efficient floating-point adder and multiplier with IEEE-754 compatible semantics. - Andreas Ehliar (FPT, 2014)

Challenging the limits of FFT performance on FPGAs (Invited paper). - Mario Garrido; Miguel Acevedo; Andreas Ehliar; Oscar Gustafsson (ISIC, 2014)