Andreas Hoffmann

Affiliations:
  • Synopsys GmbH, Herzogenrath, Germany
  • CoWare, Inc., Aachen, Germany
  • LISATek Inc., Menlo Park, CA, USA
  • RWTH Aachen University, Integrated Signal Processing Systems, Germany


According to our database1, Andreas Hoffmann authored at least 27 papers between 1999 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2020
ARM-on-ARM: Leveraging Virtualization Extensions for Fast Virtual Platforms.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2018
OHEX: OS-aware hybridization techniques for accelerating MPSoC full-system simulation.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2016
SystemC-link: Parallel SystemC simulation using time-decoupled segments.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Virtual hardware-in-the-loop co-simulation for multi-domain automotive systems via the functional mock-up interface.
Proceedings of the 2015 Forum on Specification and Design Languages, 2015

2014
legaSCi: Legacy SystemC Model Integration into Parallel Simulators.
ACM Trans. Embed. Comput. Syst., 2014

2011
Checkpointing SystemC-Based Virtual Platforms.
Int. J. Embed. Real Time Commun. Syst., 2011

2010
parSC: synchronous parallel systemc simulation on multi-core host architectures.
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010

2006
Application Specific Processing: A Tools Approach.
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

2005
A Novel Methodology for the Design of Application-Specific Instruction-Set Processors.
Proceedings of the Embedded Systems Handbook., 2005

A Methodology and Tooling Enabling Application Specific Processor Design.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

2004
A universal technique for fast and flexible instruction-set architecture simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

2003
Methodical Low-Power ASIP Design Space Exploration.
J. VLSI Signal Process., 2003

Instruction encoding synthesis for architecture exploration using hierarchical processor models.
Proceedings of the 40th Design Automation Conference, 2003

Generic Tool-Set for SoC Mulitiprocessor Debugging and Synchronization.
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003

2002
Architecture Implementation Using the Machine Description Language LISA.
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

Application specific compiler/architecture codesign: a case study.
Proceedings of the 2002 Joint Conference on Languages, 2002

Architecture exploration for embedded processors with LISA.
Kluwer, ISBN: 978-1-4020-7338-0, 2002

2001
A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

Using static scheduling techniques for the retargeting of high speed, compiled simulators for embedded processors from an abstract machine description.
Proceedings of the 14th International Symposium on Systems Synthesis, 2001

A Methodology for the Design of Application Specific Instruction Set Processors (ASIP) using the Machine Description Language LISA.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

A survey on modeling issues using the machine description language LISA.
Proceedings of the IEEE International Conference on Acoustics, 2001

Generating production quality software development tools using a machine description language.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001

A framework for fast hardware-software co-simulation.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000
Retargetable compiled simulation of embedded processors using a machine description language.
ACM Trans. Design Autom. Electr. Syst., 2000

Retargeting of Compiled Simulators for Digital Signal Processors Using a Machine Description Language.
Proceedings of the 2000 Design, 2000

1999
Schnelle Simulation des TI-TMS320C54x DSP.
Informationstechnik Tech. Inform., 1999

LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures.
Proceedings of the 36th Conference on Design Automation, 1999


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