Reconfigurable, conditional pre-charge SRAM: Lowering read power by leveraging data statistics. - Chuhong Duan; Andreas J. Gotterba; Mahmut E. Sinangil; Anantha P. Chandrakasan (A-SSCC, 2016)

A 28 nm 2 Mbit 6 T SRAM With Highly Configurable Low-Voltage Write-Ability Assist Implementation and Capacitor-Based Sense-Amplifier Input Offset Compensation. - Mahmut E. Sinangil; John W. Poulton; Matthew R. Fojtik; Thomas H. Greer; Stephen G. Tell; Andreas J. Gotterba; Jesse Wang; Jason Golbus; Brian Zimmer; William J. Dally; C. Thomas Gray (IEEE J. Solid State Circuits, 2016)

Energy-Efficient Reconfigurable SRAM: Reducing Read Power Through Data Statistics. - Chuhong Duan; Andreas J. Gotterba; Mahmut E. Sinangil; Anantha P. Chandrakasan (IEEE J. Solid State Circuits, 2017)