Modeling and Simulation of TDL Applications. - Stefan Resmerita; Patricia Derler; Wolfgang Pree; Andreas Naderlinger (Model-Based Engineering of Embedded Real-Time Systems, 2007)

Simulation of LET Models in Simulink and Ptolemy. - Patricia Derler; Andreas Naderlinger; Wolfgang Pree; Stefan Resmerita; Josef Templ (Monterey Workshop, 2008)

A framework for command processing in Java/Swing programs based on the MVC pattern. - Andreas Naderlinger; Josef Templ (PPPJ, 2008)

Migration of Legacy Software Towards Correct-by-Construction Timing Behavior. - Stefan Resmerita; Kenneth R. Butts; Patricia Derler; Andreas Naderlinger; Wolfgang Pree (Monterey Workshop, 2010)

An asynchronous Java interface to MATLAB. - Andreas Naderlinger; Josef Templ; Stefan Resmerita; Wolfgang Pree (SimuTools, 2011)

TDL - Steps Beyond Giotto: A Case for Automated Software Construction. - Wolfgang Pree; Josef Templ; Peter Hintenaus; Andreas Naderlinger; Johannes Pletzer (Int. J. Softw. Informatics, 2011)

Multiple real-time semantics on top of synchronous block diagrams. - Andreas Naderlinger (SpringSim (TMS-DEVS), 2013)

Applying Real-Time Programming to Legacy Embedded Control Software. - Stefan Resmerita; Andreas Naderlinger; Manuel Huber 001; Kenneth R. Butts; Wolfgang Pree (ISORC, 2015)

Poster Abstract: Towards Parallelizing Legacy Embedded Control Software Using the LET Programming Paradigm. - Julien Hennig; Hermann von Hasseln; Hassan Mohammad; Stefan Resmerita; Stefan Lukesch; Andreas Naderlinger (RTAS, 2016)

Simulating preemptive scheduling with timing-aware blocks in Simulink. - Andreas Naderlinger (DATE, 2017)

Efficient realization of logical execution times in legacy embedded software. - Stefan Resmerita; Andreas Naderlinger; Stefan Lukesch (MEMOCODE, 2017)

Simulating execution time variations in Matlab/Simulink. - Andreas Naderlinger (WSC, 2017)

Subjecting Legacy Simulink Models to Timing Specifications. - Andreas Naderlinger (CyPhy/WESE, 2018)

A TrueTime Extension for Instruction-level Timing and Multi-stack Support. - Andreas Naderlinger; Michael Moser (IECON, 2019)

Harnessing Concurrency in Synchronous Block Diagrams to Parallelize Simulation on Multi-Core Hosts. - Andreas Naderlinger (WSC, 2019)