Coherent Shared Memory on a Distributed Memory Machine. - Roberto Bisiani; Andreas Nowatzyk; Mosur Ravishankar (ICPP (1), 1989)

The S3.mp Architecture: A Local Area Multiprocessor. - Andreas Nowatzyk; M. Monger; Michael Parkin; Edmund J. Kelly; Michael C. Browne; Gunes Aybay; David Lee (SPAA, 1993)

The S3mp Scalable Shared Memory Multiprocessor. - Andreas Nowatzyk; Gunes Aybay; Michael C. Browne; Edmund J. Kelly; David Lee; Michael Parkin (HICSS (1), 1994)

Exploiting Parallelism in Cache Coherency Protocol Engines. - Andreas Nowatzyk; Gunes Aybay; Michael C. Browne; Edmund J. Kelly; Michael Parkin; Bill Radke; Sanjay Vishin (Euro-Par, 1995)

Verifying Distributed Directory-Based Cahce Coherence Protocols: S3.mp, a Case Study. - Fong Pong; Andreas Nowatzyk; Gunes Aybay; Michel Dubois 001 (Euro-Par, 1995)

The S3.mp Scalable Shared Memory Multiprocessor. - Andreas Nowatzyk; Gunes Aybay; Michael C. Browne; Edmund J. Kelly; Michael Parkin; Bill Radke; Sanjay Vishin (ICPP (1), 1995)

S-Connect: From Networks of Workstations to Supercomputer Performance. - Andreas Nowatzyk; Michael C. Browne; Edmund J. Kelly; Michael Parkin (ISCA, 1995)

Are Crossbars Really Dead? The Case for Optical Multiprocessor Interconnect Systems. - Andreas Nowatzyk; Paul R. Prucnal (ISCA, 1995)

Missing the Memory Wall: The Case for Processor/Memory Integration. - Ashley Saulsbury; Fong Pong; Andreas Nowatzyk (ISCA, 1996)

Design Verification of the S3.mp Cache-Coherent Shared-Memory System. - Fong Pong; Michael C. Browne; Gunes Aybay; Andreas Nowatzyk; Michel Dubois 001 (IEEE Trans. Computers, 1998)

Impact of Chip-Level Integration on Performance of OLTP Workloads. - Luiz André Barroso; Kourosh Gharachorloo; Andreas Nowatzyk; Ben Verghese (HPCA, 2000)

Piranha: a scalable architecture based on single-chip multiprocessing. - Luiz André Barroso; Kourosh Gharachorloo; Robert McNamara; Andreas Nowatzyk; Shaz Qadeer; Barton Sano; Scott Smith; Robert Stets; Ben Verghese (ISCA, 2000)

Fingerprinting: Bounding Soft-Error-Detection Latency and Bandwidth. - Jared C. Smolens; Brian T. Gold; Jangwoo Kim; Babak Falsafi; James C. Hoe; Andreas Nowatzyk (IEEE Micro, 2004)

SimFlex: a fast, accurate, flexible full-system simulation framework for performance evaluation of server architecture. - Nikolaos Hardavellas; Stephen Somogyi; Thomas F. Wenisch; Roland E. Wunderlich; Shelley Chen; Jangwoo Kim; Babak Falsafi; James C. Hoe; Andreas Nowatzyk (SIGMETRICS Perform. Evaluation Rev., 2004)

TRUSS: A Reliable, Scalable Server Architecture. - Brian T. Gold; Jangwoo Kim; Jared C. Smolens; Eric S. Chung; Vasileios Liaskovitis; Eriko Nurvitadhi; Babak Falsafi; James C. Hoe; Andreas Nowatzyk (IEEE Micro, 2005)

Intelligent noncontact surgeon-computer interface using hand gesture recognition. - Michael Zhao; Andreas Nowatzyk; Thomas Lu; Daniel L. Farkas (Three-Dimensional Image Capture and Applications, 2008)

PHAST: Hardware-accelerated shortest path trees. - Daniel Delling; Andrew V. Goldberg; Andreas Nowatzyk; Renato F. Werneck (J. Parallel Distributed Comput., 2013)

Project PBerry: FPGA Acceleration for Remote Memory. - Irina Calciu; Ivan Puddu; Aasheesh Kolli; Andreas Nowatzyk; Jayneel Gandhi; Onur Mutlu; Pratap Subrahmanyam (HotOS, 2019)

The history, status, and future of FPGAs. - Oskar Mencer; Dennis Allison; Elad Blatt; Mark Cummings; Michael J. Flynn; Jerry Harris; Carl Hewitt; Quinn Jacobson; Maysam Lavasani; Mohsen Moazami; Hal Murray; Masoud Nikravesh; et al. (Commun. ACM, 2020)

The History, Status, and Future of FPGAs: Hitting a nerve with field-programmable gate arrays. - Oskar Mencer; Dennis Allison; Elad Blatt; Mark Cummings; Michael J. Flynn; Jerry Harris; Carl Hewitt; Quinn Jacobson; Maysam Lavasani; Mohsen Moazami; Hal Murray; Masoud Nikravesh; et al. (ACM Queue, 2020)