A fully integrated CMOS PM radio receiver for wristwatch calibration. - Philippe Cathelin; Andreia Cathelin; Xavier Saboret; Nicolas Krasnanski; Pierre Legras; Raed V. Moughabghab; Olivier Declerck; Marc Miodini; Frank Op't Eynde (IEEE J. Solid State Circuits, 1998)

Substrate Parasitic Extraction for RF Integrated Circuits. - Andreia Cathelin; Daniel Saias; Didier Belot; Youri Leclercq; François J. R. Clément (DATE, 2002)

A multi-mode continuously-tunable lowpass filter for zero-IF mobile applications. - David Chamla; Andreas Kaiser; Andreia Cathelin; Didier Belot (ESSCIRC, 2004)

A study on FBAR Filters reconfiguration. - Moustapha El Hassan; Eric Kerherve; Yann Deval; Alexandre A. Shirakawa; Pierre Jarry; Andreia Cathelin (ICECS, 2005)

Evaluation of Capacitor Ratios in Automated Accurate Common-Centroid Capacitor Arrays. - DiaaEldin Khalil; Mohamed Dessouky; Vincent Bourguet; Marie-Minerve Louërat; Andreia Cathelin; Hani F. Ragai (ISQED, 2005)

A 1 V 270 My-W 2 GHz CMOS Synchronized Ring Oscillator Based Prescaler. - Olivier Mazouffre; Hervé Lapuyade; Jean-Baptiste Bégueret; Andreia Cathelin; Didier Belot; Yann Deval (J. Low Power Electron., 2005)

A Gm-C low-pass filter for zero-IF mobile applications with a very wide tuning range. - David Chamla; Andreas Kaiser; Andreia Cathelin; Didier Belot (IEEE J. Solid State Circuits, 2005)

Design techniques for very high speed digital delta-sigma modulators aimed at all-digital RE transmitters. - Antoine Frappé; Axel Flament; Andreas Kaiser; Bruno Stefanelli; Andreia Cathelin (ICECS, 2006)

Reconfigurable digital Delta-Sigma Modulator Synthesis for digital wireless transmitters. - C. Nsiala Nzeza; Jean Gorisse; Antoine Frappé; Axel Flament; Andreas Kaiser; Andreia Cathelin (ECCTD, 2007)

Design for millimeter-wave applications in silicon technologies. - Andreia Cathelin; Baudouin Martineau; N. Seller; S. Douyere; Jean Gorisse; Sébastien Pruvost; Christine Raynaud; Frederic Gianesello; Sébastien Montusclat; Sorin P. Voinigescu; Ali M. Niknejad; Didier Belot; et al. (ESSCIRC, 2007)

80 GHz low noise amplifiers in 65nm CMOS SOI. - Baudouin Martineau; Andreia Cathelin; François Danneville; Andreas Kaiser; Gilles Dambrine; Sylvie Lépilliet; Frederic Gianesello; Didier Belot (ESSCIRC, 2007)

Digital tuning of an analog tunable bandpass BAW-filter at GHz frequency. - Stephane Razafimandimby; Cyrille Tilhac; Andreia Cathelin; Andreas Kaiser; Didier Belot (ESSCIRC, 2007)

A Mixed Ladder-Lattice Bulk Acoustic Wave Duplexer for W-CDMA Handsets. - Alexandre A. Shirakawa; Moustapha El Hassan; Andreia Cathelin (ICECS, 2007)

A 2GHz 0.25μm SiGe BiCMOS Oscillator with Flip-Chip Mounted BAW Resonator. - S. Razafimandimby; Andreia Cathelin; Jerome Lajoinie; Andreas Kaiser; Didier Belot (ISSCC, 2007)

A Switchable-Order Gm-C Baseband Filter With Wide Digital Tuning for Configurable Radio Receivers. - David Chamla; Andreas Kaiser; Andreia Cathelin; Didier Belot (IEEE J. Solid State Circuits, 2007)

A 1.2 GHz semi-digital reconfigurable FIR bandpass filter with passive power combiner. - Axel Flament; Antoine Frappé; Andreas Kaiser; Bruno Stefanelli; Andreia Cathelin; Hilal Ezzeddine (ESSCIRC, 2008)

A 60GHz 65nm CMOS RMS power detector for antenna impedance mismatch detection. - Jean Gorisse; Andreia Cathelin; Andreas Kaiser; Eric Kerherve (ESSCIRC, 2009)

A combined 4-bit quadrature digital to analog converter/mixer for millimeter-wave applications. - Axel Flament; Philippe Lombard; Bruno Stefanelli; Andreas Kaiser; Andreia Cathelin (ICECS, 2009)

An All-Digital RF Signal Generator Using High-Speed ΔΣ Modulators. - Antoine Frappé; Axel Flament; Bruno Stefanelli; Andreas Kaiser; Andreia Cathelin (IEEE J. Solid State Circuits, 2009)

A FIR baseband filter for high data rate 60-GHz wireless communications. - Jonathan Müller; Andreia Cathelin; Ali M. Niknejad; Andreas Kaiser (ISCAS, 2010)

Design of 10 GHz sampling rate digital FIR filters with powers-of-two coefficients. - Benjamin Parent; Jonathan Müller; Andreas Kaiser; Andreia Cathelin (ECCTD, 2011)

A 20-23GHz Coupled Oscillators Array in 65nm CMOS for HDR 60GHz beamforming applications. - Mathieu Egot; Baudouin Martineau; Olivier Richard; Nathalie Rolland; Andreia Cathelin; Andreas Kaiser (ESSCIRC, 2011)

A 7-bit 18th order 9.6 GS/s FIR filter for high data rate 60-GHz wireless communications. - Jonathan Müller; Bruno Stefanelli; Antoine Frappé; Lu Ye; Andreia Cathelin; Ali M. Niknejad; Andreas Kaiser (ESSCIRC, 2011)

A 6.7-ENOB, 500-MS/s, 5.1-mW dynamic pipeline ADC in 65-nm SOI CMOS. - Ray Nguyen; Christine Raynaud; Andreia Cathelin; Boris Murmann (ESSCIRC, 2011)

Towards personalized medicine and monitoring for healthy living. - Christian C. Enz; Andreia Cathelin; Maysam Ghovanloo; Stefan Heinen; Minkyu Je; David Scott (ISSCC, 2011)

A 65nm CMOS fully integrated transceiver module for 60GHz wireless HD applications. - Alexandre Siligaris; Olivier Richard; Baudouin Martineau; Christopher Mounet; Fabrice Chaix; Romain Ferragut; Cedric Dehos; Jérôme Lantéri; Laurent Dussopt; Silas D. Yamamoto; Romain Pilard; Pierre Busson; et al. (ISSCC, 2011)

A 65-nm CMOS Fully Integrated Transceiver Module for 60-GHz Wireless HD Applications. - Alexandre Siligaris; Olivier Richard; Baudouin Martineau; Christopher Mounet; Fabrice Chaix; Romain Ferragut; Cedric Dehos; Jérôme Lantéri; Laurent Dussopt; Silas D. Yamamoto; Romain Pilard; Pierre Busson; et al. (IEEE J. Solid State Circuits, 2011)

A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications. - Fawzi Houfaf; Mathieu Egot; Andreas Kaiser; Andreia Cathelin; Bram Nauta (ISSCC, 2012)

A 1kpixel CMOS camera chip for 25fps real-time terahertz imaging applications. - Hani Sherry; Janus Grzyb; Yan Zhao 002; Richard Al Hadi; Andreia Cathelin; Andreas Kaiser; Ullrich R. Pfeiffer (ISSCC, 2012)

Gaining 10x in energy efficiency in the next decade in consumer products. - Philippe Magarshack; Andreia Cathelin (VLSI-DAT, 2012)

A 1 k-Pixel Video Camera for 0.7-1.1 Terahertz Imaging Applications in 65-nm CMOS. - Richard Al Hadi; Hani Sherry; Janus Grzyb; Yan Zhao 002; Wolfgang Forster; H. M. Keller; Andreia Cathelin; Andreas Kaiser; Ullrich R. Pfeiffer (IEEE J. Solid State Circuits, 2012)

A 7-Bit 18th Order 9.6 GS/s FIR Up-Sampling Filter for High Data Rate 60-GHz Wireless Transmitters. - Jonathan Müller; Bruno Stefanelli; Antoine Frappé; Lu Ye; Andreia Cathelin; Ali M. Niknejad; Andreas Kaiser (IEEE J. Solid State Circuits, 2012)

A digitally modulated mm-Wave cartesian beamforming transmitter with quadrature spatial combining. - Jiashu Chen; Lu Ye; Diane Titz; Fred Gianesello; Romain Pilard; Andreia Cathelin; Fabien Ferrero; Cyril Luxey; Ali M. Niknejad (ISSCC, 2013)

A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization. - David Jacquet; Frederic Hasbani; Philippe Flatresse; Robin Wilson; Franck Arnaud; Giorgio Cesana; Thierry Di Gilio; Christophe Lecocq; Tanmoy Roy; Amit Chhabra; Chiranjeev Grover; Olivier Minez; et al. (IEEE J. Solid State Circuits, 2014)

25.5 A 320GHz phase-locked transmitter with 3.3mW radiated power and 22.5dBm EIRP for heterodyne THz imaging systems. - Ruonan Han 001; Chen Jiang 004; Ali Mostajeran; Mohammad Emadi; Hamidreza Aghasi; Hani Sherry; Andreia Cathelin; Ehsan Afshari (ISSCC, 2015)

5.5 A forward-body-bias tuned 450MHz Gm-C 3rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply. - Joeri Lechevallier; Remko E. Struiksma; Hani Sherry; Andreia Cathelin; Eric A. M. Klumperink; Bram Nauta (ISSCC, 2015)

13.5 A -97dBm-sensitivity interferer-resilient 2.4GHz wake-up receiver using dual-IF multi-N-Path architecture in 65nm CMOS. - Camilo Salazar; Andreas Kaiser; Andreia Cathelin; Jan M. Rabaey (ISSCC, 2015)

Design considerations for low-noise transconductance amplifiers in 28nm UTBB-FDSOI. - D. Danilovic; Andreia Cathelin; Andrei Vladimirescu; Borivoje Nikolic (NEWCAS, 2015)

Considerations for high-speed configurable-bandwidth time-interleaved digital delta-sigma modulators and synthesis in 28 nm UTBB FDSOI. - Razvan-Cristian Marin; Antoine Frappé; Andreas Kaiser; Andreia Cathelin (NEWCAS, 2015)

A self-powered IPv6 bidirectional wireless sensor & actuator network for indoor conditions. - Pascal Urard; G. Romagnello; Andrei Banciu; J. C. Grasset; V. Heinrich; Mounir Boulemnakher; F. Todeschni; Laurent Damon; Roberto Guizzetti; L. Andre; Andreia Cathelin (VLSIC, 2015)

A SiGe Terahertz Heterodyne Imaging Transmitter With 3.3 mW Radiated Power and Fully-Integrated Phase-Locked Loop. - Ruonan Han 001; Chen Jiang 004; Ali Mostajeran; Mohammad Emadi; Hamidreza Aghasi; Hani Sherry; Andreia Cathelin; Ehsan Afshari (IEEE J. Solid State Circuits, 2015)

Sampling modulation: An energy efficient novel feature extraction for biosignal processing. - M. Causo; Simone Benatti; Antoine Frappé; Andreia Cathelin; Elisabetta Farella; Andreas Kaiser; Luca Benini; Jan M. Rabaey (BioCAS, 2016)

A 128 kb single-bitline 8.4 fJ/bit 90MHz at 0.3V 7T sense-amplifierless SRAM in 28 nm FD-SOI. - Babak Mohammadi; Oskar Andersson; Joseph Nguyen; Lorenzo Ciampolini; Andreia Cathelin; Joachim Neves Rodrigues (ESSCIRC, 2016)

A digital delay line with coarse/fine tuning through gate/body biasing in 28nm FDSOI. - Ilias Sourikopoulos; Antoine Frappé; Andreia Cathelin; Laurent Clavier; Andreas Kaiser (ESSCIRC, 2016)

Low power advanced digital technologies to enable Internet of Things. - Laurent Malier; Andreia Cathelin; Giorgio Cesana; Laurent Le Pailleur (ESSDERC, 2016)

25.5 A 320GHz subharmonic-mixing coherent imager in 0.13µm SiGe BiCMOS. - Chen Jiang 004; Ali Mostajeran; Ruonan Han 001; Mohammad Emadi; Hani Sherry; Andreia Cathelin; Ehsan Afshari (ISSCC, 2016)

A concurrent transmitter in CMOS 28nm FDSOI technology based on Walsh sequences generator. - Nassim Bouassida; Francois Rivet; Yann Deval; David Duperray; Andreia Cathelin (NEWCAS, 2016)

55-nm SiGe BiCMOS Distributed Amplifier Topologies for Time-Interleaved 120-Gb/s Fiber-Optic Receivers and Transmitters. - James Hoffman; Stefan Shopov; Pascal Chevalier 002; Andreia Cathelin; Peter Schvan; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2016)

A Fully Integrated 320 GHz Coherent Imaging Transceiver in 130 nm SiGe BiCMOS. - Chen Jiang 004; Ali Mostajeran; Ruonan Han 001; Mohammad Emadi; Hani Sherry; Andreia Cathelin; Ehsan Afshari (IEEE J. Solid State Circuits, 2016)

Introduction to the Special Issue on the 2015 Symposium on VLSI Circuits. - Masato Motomura; Andreia Cathelin (IEEE J. Solid State Circuits, 2016)

A 2.4 GHz Interferer-Resilient Wake-Up Receiver Using A Dual-IF Multi-Stage N-Path Architecture. - Camilo Salazar; Andreia Cathelin; Andreas Kaiser; Jan M. Rabaey (IEEE J. Solid State Circuits, 2016)

A 234-261-GHz 55-nm SiGe BiCMOS Signal Source with 5.4-7.2 dBm Output Power, 1.3% DC-to-RF Efficiency, and 1-GHz Divided-Down Output. - Stefan Shopov; Andreea Balteanu; Jürgen Hasch; Pascal Chevalier 002; Andreia Cathelin; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2016)

RF/analog and mixed-signal design techniques in FD-SOI technology. - Andreia Cathelin (CICC, 2017)

27.5 A pixel-pitch-matched ultrasound receiver for 3D photoacoustic imaging with integrated delta-sigma beamformer in 28nm UTBB FDSOI. - Man-Chia Chen; Aldo Pena Perez; Sri-Rajasekhar Kothapalli; Philippe Cathelin; Andreia Cathelin; Sanjiv Sam Gambhir; Boris Murmann (ISSCC, 2017)

A 0.92-THz SiGe Power Radiator Based on a Nonlinear Theory for Harmonic Generation. - Hamidreza Aghasi; Andreia Cathelin; Ehsan Afshari (IEEE J. Solid State Circuits, 2017)

A Pixel Pitch-Matched Ultrasound Receiver for 3-D Photoacoustic Imaging With Integrated Delta-Sigma Beamformer in 28-nm UTBB FD-SOI. - Man-Chia Chen; Aldo Pena Perez; Sri-Rajasekhar Kothapalli; Philippe Cathelin; Andreia Cathelin; Sanjiv Sam Gambhir; Boris Murmann (IEEE J. Solid State Circuits, 2017)

A High-Speed Efficient 220-GHz Spatial-Orthogonal ASK Transmitter in 130-nm SiGe BiCMOS. - Chen Jiang 004; Andreia Cathelin; Ehsan Afshari (IEEE J. Solid State Circuits, 2017)

A 170-GHz Fully Integrated Single-Chip FMCW Imaging Radar with 3-D Imaging Capability. - Ali Mostajeran; Andreia Cathelin; Ehsan Afshari (IEEE J. Solid State Circuits, 2017)

SleepTalker: A ULV 802.15.4a IR-UWB Transmitter SoC in 28-nm FDSOI Achieving 14 pJ/b at 27 Mb/s With Channel Selection Based on Adaptive FBB and Digitally Programmable Pulse Shaping. - Guerric de Streel; François Stas; Thibaut Gurne; François Durant; Charlotte Frenkel; Andreia Cathelin; David Bol (IEEE J. Solid State Circuits, 2017)

Integration of SPAD in 28nm FDSOI CMOS technology. - Tulio Chaves de Albuquerque; Françis Calmon; Raphael Clerc; Patrick Pittet; Younes Benhammou; Dominique Golanski; Sebastien Jouan; Denis Rideau; Andreia Cathelin (ESSDERC, 2018)

FD-SOI integration solutions for analog, RF and Millimeter-wave applications. - Andreia Cathelin (ESSDERC, 2018)

A 301.7-to-331.8GHz source with entirely on-chip feedback loop for frequency stabilization in 0.μm BiCMOS. - Chen Jiang 004; Mohammed Aseeri; Andreia Cathelin; Ehsan Afshari (ISSCC, 2018)

90° Hybrid coupler design technique for wideband and multimode mm-wave operations featuring lateral ground planes virtual expansion in 28nm FD-SOI CMOS technology. - Florent Torres; Eric Kerherve; Andreia Cathelin (LASCAS, 2018)

A bidirectional short range low power and high data rate W-Band transceiver for network on chip. - Dipal Ghosh; Antoine Frappé; Christophe Loyez; Andreia Cathelin (NEWCAS, 2018)

A Comparative Study of On-Body Radio-Frequency Links in the 420 MHz-2.4 GHz Range. - Arno Thielens; Robin Benarrouch; Stijn Wielandt; Matthew G. Anderson; Ali Moin; Andreia Cathelin; Jan M. Rabaey (Sensors, 2018)

All-Digital Transmitter Architecture Based on Two-Path Parallel 1-bit High Pass Filtering DACs. - Fikre Tsigabu Gebreyohannes; Antoine Frappé; Philippe Cathelin; Andreia Cathelin; Andreas Kaiser (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD-SOI. - Babak Mohammadi; Oskar Andersson; Joseph Nguyen; Lorenzo Ciampolini; Andreia Cathelin; Joachim Neves Rodrigues (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Capacitive Body-Coupled Communication in the 400-500 MHz Frequency Band. - Robin Benarrouch; Arno Thielens; Andreia Cathelin; Antoine Frappé; Andreas Kaiser; Jan M. Rabaey (BODYNETS, 2019)

A Single-Channel RF-to-Bits 36Gbps 8PSK RX with Direct Demodulation in RF Domain. - Hossein Mohammadnezhad; Huan Wang 008; Andreia Cathelin; Payam Heydari (CICC, 2019)

Body-biasing considerations with SPAD FDSOI: advantages and drawbacks. - Tulio Chaves de Albuquerque; Dylan Issartel; Raphael Clerc; Patrick Pittet; Remy Cellier; Wilfried Uhring; Andreia Cathelin; Françis Calmon (ESSDERC, 2019)

Embedded PCM macro for automotive-grade microcontroller in 28nm FD-SOI. - Fabio Disegni; Roberto Annunziata; A. Molgora; G. Campardo; Paolo Cappelletti; P. Zuliani; P. Ferreira; A. Ventre; G. Castagna; Andreia Cathelin; Anna Gandolfo; F. Goller; et al. (VLSI Circuits, 2019)

A 115-135-GHz 8PSK Receiver Using Multi-Phase RF-Correlation-Based Direct-Demodulation Method. - Hossein Mohammadnezhad; Huan Wang 008; Andreia Cathelin; Payam Heydari (IEEE J. Solid State Circuits, 2019)

A Spectrum-Sensing DPD Feedback Receiver With 30× Reduction in ADC Acquisition Bandwidth and Sample Rate. - Nikolaus Hammler; Andreia Cathelin; Philippe Cathelin; Boris Murmann (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Heartbeat-Based Synchronization Scheme for the Human Intranet: Modeling and Analysis. - Robin Benarrouch; Ali Moin; Flavien Solt; Antoine Frappé; Andreia Cathelin; Andreas Kaiser; Jan M. Rabaey (ISCAS, 2020)

Ring VCO Phase Noise Optimization by Pseudo-Differential Architecture in 28nm FD-SOI CMOS. - David Gaidioz; Magali De Matos; Andreia Cathelin; Yann Deval (ISCAS, 2020)

A Performance-Flexible Energy-Optimized Automotive-Grade Cortex-R4F SoC through Combined AVS/ABB/Bias-in-Memory-Array Closed-Loop Regulation in 28nm FD-SOI. - Ricardo Gomez Gomez; Edwige Bano; Andreia Cathelin; Sylvain Clerc (VLSI Circuits, 2020)

Energy Efficient Heartbeat-Based MAC Protocol for WBAN Employing Body Coupled Communication. - Flavien Solt; Robin Benarrouch; Guillaume Tochou; Olivér Facklam; Antoine Frappé; Andreia Cathelin; Andreas Kaiser; Jan M. Rabaey (IEEE Access, 2020)

Event-Driven Continuous-Time Feature Extraction for Ultra Low-Power Audio Keyword Spotting. - Soufiane Mourrane; Benoit Larras; Andreia Cathelin; Antoine Frappé (AICAS, 2021)

An Energy Efficient Fully Integrated 20Gbps OOK Wireless Transmitter at 220GHz. - Bahareh Hadidian; Farzad Khoeini; S. M. Hossein Naghavi; Andreia Cathelin; Ehsan Afshari (CICC, 2021)

200-GS/s ADC Front-End Employing 25% Duty Cycle Quadrature Clock Generator. - Naftali Weiss; Gregory Cooke; Peter Schvan; Pascal Chevalier 002; Andreia Cathelin; Sorin P. Voinigescu (ESSCIRC, 2021)

Artificial Intelligence: Why moving it to the Edge? - Joël Hartmann; Paolo Cappelletti; Nitin Chawla; Franck Arnaud; Andreia Cathelin (ESSDERC, 2021)

A gm/ID Design Methodology for 28 nm FD-SOI CMOS Resistive Feedback LNAs. - Sylvain Bourdel; Serge Subias; Mohamed Khalil Bouchoucha; Manuel J. Barragán; Andreia Cathelin; Carlos Galup-Montoro (ICECS, 2021)

F4: Electronics for a Quantum World. - Edoardo Charbon; Alicia Klinefelter; Massimo Alioto; Yao-Hong Liu; Munehiko Nagatani; Arijit Raychowdhury; Andreia Cathelin; Boris Murmann (ISSCC, 2021)

F3: Silicon Technologies in the Fight Against Pandemics - From Point of Care to Computational Epidemiology. - Nick Van Helleputte; Arijit Raychowdhury; Ping-Hsuan Hsieh; Jun Deguchi; Matteo Perenzoni; Esther Rodríguez-Villegas; Long Yan; Andreia Cathelin; Keith A. Bowman; Chris Van Hoof (ISSCC, 2021)

A 250GHz Autodyne FMCW Radar in 55nm BiCMOS with Micrometer Range Resolution. - S. M. Hossein Naghavi; Saghar Seyedabbaszadehesfahlani; Farzad Khoeini; Andreia Cathelin; Ehsan Afshari (ISSCC, 2021)

A Low-Noise mm-Wave Injection-Locked Oscillator designed in 65nm Partially Depleted SOI CMOS Technology. - Romane Dumont; Magali De Matos; Andreia Cathelin; Yann Deval (NEWCAS, 2021)

An Active Quenching Circuit for a Native 3D SPAD Pixel in a 28 nm CMOS FDSOI Technology. - Mohammadreza Dolatpoor Lakeh; Jean-Baptiste Kammerer; Jean-Baptiste Schell; Dylan Issartel; Françis Calmon; Andreia Cathelin; Wilfried Uhring (NEWCAS, 2021)

16MB High Density Embedded PCM macrocell for automotive-grade microcontroller in 28nm FD-SOI, featuring extension to 24MB for Over-The-Air software update. - Fabio Disegni; A. Ventre; A. Molgora; Paolo Cappelletti; R. Badalamenti; P. Ferreira; G. Castagna; Andreia Cathelin; Anna Gandolfo; Andrea Redaelli; D. Manfrè; Alfonso Maurelli; et al. (VLSI Circuits, 2021)

An Ultrafast Active Quenching Active Reset Circuit with 50% SPAD Afterpulsing Reduction in a 28 nm FD-SOI CMOS Technology Using Body Biasing Technique. - Mohammadreza Dolatpoor Lakeh; Jean-Baptiste Kammerer; Enagnon Aguénounon; Dylan Issartel; Jean-Baptiste Schell; Sven Rink; Andreia Cathelin; Françis Calmon; Wilfried Uhring (Sensors, 2021)

The Hardware Foundation of 6G: The NEW-6G Approach. - Emilio Calvanese Strinati; Michaël Peeters; César Roda Neve; Manil Dev Gomony; Andreia Cathelin; Mauro Renato Boldi; Mark Ingels; Aritra Banerjee; Pascal Chevalier 002; Bartek Kozicki; Didier Belot (EuCNC, 2022)

A 24-31GHz 28nm FD-SOI CMOS Power Amplifier Supporting 5G NR FR2 64-QAM Signals. - G. Diverrez; Eric Kerhervé; Andreia Cathelin (ICECS 2022, 2022)

Highly Linear Large Signal Compact Voltage-to-Current Converter in 28 nm FD-SOI Technology. - Andres Asprilla; Andreia Cathelin; Yann Deval (LASCAS, 2022)

Design-Oriented All-Regime All-Region 7-Parameter Short-Channel MOSFET Model Based on Inversion Charge. - Dayana A. Pino-Monroy; Patrick Scheer; Mohamed Khalil Bouchoucha; Carlos Galup-Montoro; Manuel J. Barragán; Philippe Cathelin; Jean-Michel Fournier; Andreia Cathelin; Sylvain Bourdel (IEEE Access, 2022)

A 220-GHz Energy-Efficient High-Data-Rate Wireless ASK Transmitter Array. - Bahareh Hadidian; Farzad Khoeini; S. M. Hossein Naghavi; Andreia Cathelin; Ehsan Afshari (IEEE J. Solid State Circuits, 2022)

Multi-Watt-Level 4.9-GHz Silicon Power Amplifier for Portable Thermoacoustic Imaging. - Christopher Sutardja; Ajay Singhvi; Aidan Fitzpatrick; Andreia Cathelin; Amin Arbabian (IEEE J. Solid State Circuits, 2022)

A Sub-100-μW 0.1-to-27-Mb/s Pulse-Based Digital Transmitter for the Human Intranet in 28-nm FD-SOI CMOS. - Guillaume Tochou; Robin Benarrouch; David Gaidioz; Andreia Cathelin; Antoine Frappé; Andreas Kaiser; Jan M. Rabaey (IEEE J. Solid State Circuits, 2022)

Impact of Forward Body-Biasing on Ultra-Low Voltage Switched-Capacitor RF Power Amplifier in 28 nm FD-SOI. - Guillaume Tochou; Andreia Cathelin; Antoine Frappé; Andreas Kaiser; Jan M. Rabaey (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A Survey on Sub-6 GHz Wideband LNAs for Ultra- Low-Power IoT applications. - Mohamed Khalil Bouchoucha; Mathieu Coustans; Manuel J. Barragán; Andreia Cathelin; Sylvain Bourdel (IEEE DataPort, 2022)

A Low-Power 20Gb/s 196GHz BPSK Wireless Transmitter with Energy Efficiency FoM of 0.15pJ/bit/cm. - Lili Chen; Morteza Tavakoli Taba; Andreia Cathelin; Ehsan Afshari (CICC, 2023)

A 194-238GHz Fully On-Chip Self-Referenced Frequency Stabilized Radiator for High Range Resolution Imaging. - Bahareh Hadidian; Farzad Khoeini; S. M. Hossein Naghavi; Andreia Cathelin; Kamal Sarabandi; Ehsan Afshari (CICC, 2023)

A Compact CMOS 363 GHz Autodyne FMCW Radar with 57 GHz Bandwidth for Dental Imaging. - Morteza Tavakoli Taba; S. M. Hossein Naghavi; Morteza Fayazi; Ali Sadeghi; Andreia Cathelin; Ehsan Afshari (CICC, 2023)

0.45-mW 2.35-3.0 GHz Multiplying DLL with Calibration Loop in 28nm CMOS FD-SOI. - Andres Asprilla; Andreia Cathelin; Yann Deval (ESSCIRC, 2023)

A wideband sub-6GHz continuously tunable gm-boosted CG Low Noise Amplifier in 28 nm FD-SOI CMOS technology. - Mohamed Khalil Bouchoucha; Manuel J. Barragán; Andreia Cathelin; Sylvain Bourdel (ESSCIRC, 2023)

A 291nW Real-Time Event-Driven Spectrogram Extraction unit in 28nm FD-SOI CMOS for Keyword Spotting Application. - Soufiane Mourrane; Benoit Larras; Sylvain Clerc; Andreia Cathelin; Antoine Frappé (ESSCIRC, 2023)

A 53-62 GHz Two-channel Differential 6-bit Active Phase Shifter in 55-nm SiGe Technology. - Morteza Tavakoli Taba; S. M. Hossein Naghavi; Sara Shoouri; Andreia Cathelin; Ehsan Afshari (ESSCIRC, 2023)

Performance benchmark of State-of-the-art Sub-6-GHz wideband LNAs Based on an Extensive Survey. - Mohamed Khalil Bouchoucha; Mathieu Coustans; Manuel J. Barragán; Andreia Cathelin; Sylvain Bourdel (ISCAS, 2023)

Resistive Feedback LNA design using a 7-parameter design-oriented model for advanced technologies. - Mohamed Khalil Bouchoucha; Dayana A. Pino-Monroy; Patrick Scheer; Philippe Cathelin; Jean-Michel Fournier; Manuel J. Barragán; Andreia Cathelin; Sylvain Bourdel (ISCAS, 2023)

Design-oriented model for short-channel MOS transistors based on inversion charge. - Dayana A. Pino-Monroy; Patrick Scheer; Mohamed Khalil Bouchoucha; Carlos Galup-Montoro; Manuel J. Barragán; Jean-Michel Fournier; Andreia Cathelin; Sylvain Bourdel (LASCAS, 2023)

Substrate noise mitigation using high resistivity base silicon wafer for a 14 GHz VCO on 28 nm FD-SOI. - Youssef Bendou; Martin Rack; Dimitri Lederer; Andreia Cathelin; Jean-Pierre Raskin (NEWCAS, 2023)

High-Resolution Fractional Digital Frequency Divider using a Binary-Rate Multiplier. - Denis Flores; Dominique Dallet; Andrei Vladimirescu; Andreia Cathelin; Yann Deval (NEWCAS, 2023)

Low-Power Event-Driven Spectrogram Extractor for Multiple Keyword Spotting: A proof of concept. - Soufiane Mourrane; Benoit Larras; Sylvain Clerc; Andreia Cathelin; Antoine Frappé (NEWCAS, 2023)

A 5-DC-parameter MOSFET model for circuit simulation in QucsStudio and SPECTRE. - Deni Germano Alves Neto; Cristina Missel Adotnes; Gabriel Maranhão; Mohamed Khalil Bouchoucha; Manuel J. Barragán; Andreia Cathelin; Márcio Cherem Schneider; Sylvain Bourdel; Carlos Galup-Montoro (NEWCAS, 2023)

ASIL-D automotive-grade microcontroller in 28nm FD-SOI with full-OTA capable 21MB embedded PCM memory and highly scalable power management. - Nicolas Grossier; Fabio Disegni; A. Ventre; Antonio Barcella; R. Mariani; V. Marino; S. Mazzara; A. Scavuzzo; M. Bansal; B. Soni; A. Anand; S. Banzal; et al. (VLSI Technology and Circuits, 2023)

Corrections to "Design-Oriented All-Regime All-Region 7-Parameter Short-Channel MOSFET Model Based on Inversion Charge". - Dayana A. Pino-Monroy; Patrick Scheer; Mohamed Khalil Bouchoucha; Carlos Galup-Montoro; Manuel J. Barragán; Philippe Cathelin; Jean-Michel Fournier; Andreia Cathelin; Sylvain Bourdel (IEEE Access, 2023)

Dynamic Analysis of RF CMOS Inverter-Based Ring Oscillators using an All-Region MOSFET Charge-Based Model in 28nm FD-SOI CMOS. - Julien Poupon; Manuel J. Barragán; Andreia Cathelin; Sylvain Bourdel (ISCAS, 2024)

24.4 Sub-THz Ruler: Spectral Bistability in a 235GHz Self-Injection-Locked Oscillator for Agile and Unambiguous Ranging. - S. M. Hossein Naghavi; Morteza Tavakoli Taba; Amirata Tabatabavakili; Ali Mostajeran; Mohammed Aseeri; Andreia Cathelin; Ehsan Afshari (ISSCC, 2024)

Exploration of Low-Energy Floating-Point Flash Attention Mechanism for 18nm FD-SOI CMOS Integration at the Edge. - Joaquin Cornejo; Filipe Pouget; Sylvain Clerc; Tifenn Hirtzlin; Benoit Larras; Andreia Cathelin; Antoine Frappé (MWSCAS, 2024)

Design-Oriented Single-Piece 5-DC-Parameter MOSFET Model. - Deni Germano Alves Neto; Mohamed Khalil Bouchoucha; Gabriel Maranhão; Manuel J. Barragán; Márcio Cherem Schneider; Andreia Cathelin; Sylvain Bourdel; Carlos Galup-Montoro (IEEE Access, 2024)

Design-Oriented Single-Piece Explicit I-V DC Charge-Based Model for MOS Transistors in Nanometric Technologies. - Julien Poupon; Manuel J. Barragan Asian; Andreia Cathelin; Sylvain Bourdel (IEEE Access, 2024)

A High-Efficiency High-Power 170-176-GHz Frequency Stabilized Quadrature Radiator. - Lili Chen; Andreia Cathelin; Ehsan Afshari (IEEE J. Solid State Circuits, 2024)

A Fast Back-to-Lock DPLL-Based 192-210-GHz Chirp Generator With +5.9-dBm Peak Output Power for Sub-THz Imaging and Sensing. - Lili Chen; Morteza Tavakoli Taba; Zainulabideen J. Khalifa; Andreia Cathelin; Ehsan Afshari (IEEE J. Solid State Circuits, 2024)

A Sub-400-nW Real-Time Event-Driven Spectrogram Extraction Unit in 28-nm FD-SOI CMOS for Keyword Spotting Application. - Soufiane Mourrane; Benoit Larras; Sylvain Clerc; Andreia Cathelin; Antoine Frappé (IEEE J. Solid State Circuits, 2025)