Dual Sawtooth-Based Delay Locked Loops for Heterogeneous 3-D Clock Networks. - Andres Ayes; Eby G. Friedman (SOCC, 2023)

Linear Clock Tree Topology for Dynamic Source Synchronous and Fully Synchronous 3-D Interfaces. - Andres Ayes; Eby G. Friedman (Integr., 2023)

Quasi-Adiabatic Clock Networks in 3-D Voltage Stacked Systems. - Andres Ayes; Eby G. Friedman (IEEE Trans. Very Large Scale Integr. Syst., 2024)

Network-on-Interposer Co-Design for Heterogeneous Chiplet-Based Integrated Systems. - Andres Ayes; Eby G. Friedman; Marilyn Wolf (ISCAS, 2025)