Power Modelling in Field Programmable Gate Arrays (FPGA). - Andrés D. García; Wayne P. Burleson; Jean-Luc Danger (FPL, 1999)

Low power digital design in FPGAs (poster abstract): a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption. - Andrés D. García; Jean-Luc Danger; Wayne P. Burleson (FPGA, 2000)

Low power digital design in FPGAs: a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption. - Andrés D. García; Wayne P. Burleson; Jean-Luc Danger (ISCAS, 2000)

Power Consumption Management on FPGAs. - Andrés David García García; Luis Fernando González Pérez; Reynaldo Félix Acuña (CONIELECOMP, 2005)

Hardware Architecture of MAP Algorithm for Turbo Codes Implemented in a FPGA. - Roberto Ramírez Marín; Andrés David García García; Luis Fernando González Pérez; Javier Eduardo González Villarruel (CONIELECOMP, 2005)

VLSI Architecture for the M Algorithm Suited for Detection and Source Coding Applications. - Luis Fernando González Pérez; Emmanuel Boutillon; Andrés David García García; Javier Eduardo González Villarruel; Reynaldo Félix Acuña (CONIELECOMP, 2005)

Measuring Leakage Power in Nanometer CMOS 6T-SRAM Cells. - Marcos R. de Alba-Rosano; Andrés David García García (ReConFig, 2006)

Bio - Inspired & Traditional Approaches to Obtain Fault Tolerance. - Carlos E. Gutiérrez Salmeron; Andrés David García García; Reynaldo Félix Acuña (ReConFig, 2006)

Multi-channel Driving Systems for Therapeutic Applications Based-on Focused Ultrasound. - J. Pindter-Medina; Samuel Pichardo; Laura Curiel; Andrés David García García; Jesús Enrique Chong-Quero (ReConFig, 2010)

Analysis of Parallel Sorting Algorithms in K-best Sphere-Decoder Architectures for MIMO Systems. - Pedro Cervantes Lozano; Luis Fernando González Pérez; Andrés David García García (ReConFig, 2011)

A VLSI architecture for the K-best Sphere-Decoder in MIMO systems. - Pedro Cervantes Lozano; Luis Fernando González Pérez; Andrés David García García (ReConFig, 2012)

A VLSI architecture for the QR decomposition based on the MCGR algorithm. - Pedro Cervantes Lozano; Luis Fernando González Pérez; Andrés David García García (ReConFig, 2013)