Design planning for high-performance ASICs. - John Y. Sayah; Rajesh Gupta; Deepak D. Sherlekar; Philip S. Honsinger; Jitendra M. Apte; S. Wayne Bollinger; Hai Hsia Chen; Sumit DasGupta; Edward P. Hsieh; Andrew D. Huber; Edward J. Hughes; Zahi M. Kurzum; et al. (IBM J. Res. Dev., 1996)

New placement prediction and mitigation techniques for local routing congestion. - Taraneh Taghavi; Zhuo Li 001; Charles J. Alpert; Gi-Joon Nam; Andrew D. Huber; Shyam Ramji (ICCAD, 2010)

GLARE: global and local wiring aware routability evaluation. - Yaoguang Wei; Cliff C. N. Sze; Natarajan Viswanathan; Zhuo Li 001; Charles J. Alpert; Lakshmi N. Reddy; Andrew D. Huber; Gustavo E. Téllez; Douglas Keller; Sachin S. Sapatnekar (DAC, 2012)

Techniques for scalable and effective routability evaluation. - Yaoguang Wei; Cliff C. N. Sze; Natarajan Viswanathan; Zhuo Li 001; Charles J. Alpert; Lakshmi N. Reddy; Andrew D. Huber; Gustavo E. Téllez; Douglas Keller; Sachin S. Sapatnekar (ACM Trans. Design Autom. Electr. Syst., 2014)