Design and Implementation of the Fiduccia-Mattheyses Heuristic for VLSI Netlist Partitioning. - Andrew E. Caldwell; Andrew B. Kahng; Igor L. Markov (ALENEX, 1999)

Hypergraph Partitioning for VLSI CAD: Methodology for Heuristic Development, Experimentation and Reporting. - Andrew E. Caldwell; Andrew B. Kahng; Andrew A. Kennings; Igor L. Markov (DAC, 1999)

Hypergraph Partitioning with Fixed Vertices. - Andrew E. Caldwell; Andrew B. Kahng; Igor L. Markov (DAC, 1999)

Partitioning with terminals: a "new" problem and new benchmarks. - Charles J. Alpert; Andrew E. Caldwell; Andrew B. Kahng; Igor L. Markov (ISPD, 1999)

On wirelength estimations for row-based placement. - Andrew E. Caldwell; Andrew B. Kahng; Stefanus Mantik; Igor L. Markov; Alexander Zelikovsky (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Analytical Engines are Unnecessary in Top-down Partitioning-based Placement. - Charles J. Alpert; Andrew E. Caldwell; Tony F. Chan; Dennis J.-H. Huang; Andrew B. Kahng; Igor L. Markov; M. S. Moroz (VLSI Design, 1999)

Improved algorithms for hypergraph bipartitioning. - Andrew E. Caldwell; Andrew B. Kahng; Igor L. Markov (ASP-DAC, 2000)

GTX: the MARCO GSRC technology extrapolation system. - Andrew E. Caldwell; Yu Cao 001; Andrew B. Kahng; Farinaz Koushanfar; Hua Lu 004; Igor L. Markov; Michael Oliver; Dirk Stroobandt; Dennis Sylvester (DAC, 2000)

Can recursive bisection alone produce routable placements? - Andrew E. Caldwell; Andrew B. Kahng; Igor L. Markov (DAC, 2000)

Admissibility Proofs for the LCS* Algorithm. - Marcelo O. Johann; Andrew E. Caldwell; Ricardo Augusto da Luz Reis; Andrew B. Kahng (IBERAMIA-SBIA, 2000)

Design and Implementation of Move-Based Heuristics for VLSI Hypergraph Partitioning. - Andrew E. Caldwell; Andrew B. Kahng; Igor L. Markov (ACM J. Exp. Algorithmics, 2000)

Hypergraph partitioning with fixed vertices [VLSI CAD]. - Charles J. Alpert; Andrew E. Caldwell; Andrew B. Kahng; Igor L. Markov (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Optimal partitioners and end-case placers for standard-cell layout. - Andrew E. Caldwell; Andrew B. Kahng; Igor L. Markov (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Iterative Partitioning with Varying Node Weights. - Andrew E. Caldwell; Andrew B. Kahng; Igor L. Markov (VLSI Design, 2000)

Toward CAD-IP Reuse: A Web Bookshelf of Fundamental Algorithms. - Andrew E. Caldwell; Igor L. Markov (IEEE Des. Test Comput., 2002)

Hierarchical whitespace allocation in top-down placement. - Andrew E. Caldwell; Andrew B. Kahng; Igor L. Markov (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003)

Effective iterative techniques for fingerprinting design IP. - Andrew E. Caldwell; Hyun-Jin Choi; Andrew B. Kahng; Stefanus Mantik; Miodrag Potkonjak; Gang Qu 001; Jennifer L. Wong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004)