Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing. - Ron Sass; William V. Kritikos; Andrew G. Schmidt; Srinivas Beeravolu; Parag Beeraka (FCCM, 2007)

Quantifying Effective Memory Bandwidth of Platform FPGAs. - Andrew G. Schmidt; Ron Sass (FCCM, 2007)

Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores. - Andrew G. Schmidt; Ron Sass (FPL, 2007)

FPGA Session Control (FSC): Providing Remote Access to a Cluster of FPGAs. - Yamuna Rajasekhar; Yashodhan Phatak; Andrew G. Schmidt; William V. Kritikos; Ron Sass (FCCM, 2008)

Reconfigurable Computing Cluster Project: Phase I Brief. - Andrew G. Schmidt; William V. Kritikos; Siddhartha Datta; Ron Sass (FCCM, 2008)

Teaching FPGA system design via a remote laboratory facility. - Yamuna Rajasekhar; William V. Kritikos; Andrew G. Schmidt; Ron Sass (FPL, 2008)

AIREN: A Novel Integration of On-Chip and Off-Chip FPGA Networks. - Andrew G. Schmidt; William V. Kritikos; Rahul R. Sharma; Ron Sass (FCCM, 2009)

Hardware implementation of MPI_Barrier on an FPGA cluster. - Shanyuan Gao; Andrew G. Schmidt; Ron Sass (FPL, 2009)

A Hardware Filesystem Implementation with Multidisk Support. - Ashwin A. Mendon; Andrew G. Schmidt; Ron Sass (Int. J. Reconfigurable Comput., 2009)

Impact of reconfigurable hardware on accelerating MPI_Reduce. - Shanyuan Gao; Andrew G. Schmidt; Ron Sass (FPT, 2010)

Merging Programming Models and On-chip Networks to Meet the Programmable and Performance Needs of Multi-core Systems on a Programmable Chip. - Andrew G. Schmidt; William V. Kritikos; Ron Sass; Erik K. Anderson; Matthew French (ReConFig, 2010)

Investigating resilient high performance reconfigurable computing with minimally-invasive system monitoring. - Bin Huang; Andrew G. Schmidt; Ashwin A. Mendon; Ron Sass (HPRCTA@SC, 2010)

Checkpoint/Restart and Beyond: Resilient High Performance Computing with FPGAs. - Andrew G. Schmidt; Bin Huang; Ron Sass; Matthew French (FCCM, 2011)

A Radix Tree Router for Scalable FPGA Networks. - William V. Kritikos; Yamuna Rajasekhar; Andrew G. Schmidt; Ron Sass (FPL, 2011)

Reconfigurable Computing Cluster - A Five-Year Perspective of the Project. - Ron Sass; Andrew G. Schmidt; Scott Buscemi (PARCO, 2011)

Improving FPGA Design and Evaluation Productivity with a Hardware Performance Monitoring Infrastructure. - Andrew G. Schmidt; Ron Sass (ReConFig, 2011)

Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip. - William V. Kritikos; Andrew G. Schmidt; Ron Sass; Erik K. Anderson; Matthew French (Int. J. Reconfigurable Comput., 2012)

An Evaluation of an Integrated On-Chip/Off-Chip Network for High-Performance Reconfigurable Computing. - Andrew G. Schmidt; William V. Kritikos; Shanyuan Gao; Ron Sass (Int. J. Reconfigurable Comput., 2012)

HwPMI: An Extensible Performance Monitoring Infrastructure for Improving Hardware Design and Productivity on FPGAs. - Andrew G. Schmidt; Neil Steiner; Matthew French; Ron Sass (Int. J. Reconfigurable Comput., 2012)

Investigation into scaling I/O bound streaming applications productively with an all-FPGA cluster. - Andrew G. Schmidt; Siddhartha Datta; Ashwin A. Mendon; Ron Sass (Parallel Comput., 2012)

Fast lossless image compression with Radiation Hardening by hardware/software co-design on platform FPGAs. - Andrew G. Schmidt; Matthew French (ASAP, 2013)

High Level Hardware/Software Embedded System Design with Redsharc. - Sam Skalicky; Andrew G. Schmidt; Matthew French (CoRR, 2014)

A unified hardware/software MPSoC system construction and run-time framework. - Sam Skalicky; Andrew G. Schmidt; Sonia López; Matthew French (DATE, 2015)

A Parallelizing Matlab Compiler Framework and Run Time for Heterogeneous Systems. - Sam Skalicky; Sonia López; Marcin Lukowiak; Andrew G. Schmidt (HPCC/CSS/ICESS, 2015)

Evaluating Rapid Application Development with Python for Heterogeneous Processor-Based FPGAs. - Andrew G. Schmidt; Gabriel Weisz; Matthew French (FCCM, 2017)

Bridging the Gap between Advanced Memory and Heterogeneous Architectures. - Abhi D. Rajagopala; Ron Sass; Andrew G. Schmidt; Matthew French (FCCM, 2018)

Hot & Spicy: Improving Productivity with Python and HLS for FPGAs. - Sam Skalicky; Joshua S. Monson; Andrew G. Schmidt; Matthew French (FCCM, 2018)

Constellations in the Cloud: Virtualizing Remote Sensing Systems. - Andrew G. Schmidt; Vivek Venugopalan; Marco Paolieri; Matthew French (IGARSS, 2019)

Security-driven metrics and models for efficient evaluation of logic encryption schemes. - Yinghua Hu; Vivek V. Menon; Andrew G. Schmidt; Joshua S. Monson; Matthew French; Pierluigi Nuzzo 002 (MEMOCODE, 2019)

Volcan: System Integration of HLS and HMC on FPGAs. - Abhi D. Rajagopala; Ron Sass; Andrew G. Schmidt (ReConFig, 2019)

System-Level Framework for Logic Obfuscation with Quantified Metrics for Evaluation. - Vivek V. Menon; Gaurav Kolhe; Andrew G. Schmidt; Joshua S. Monson; Matthew French; Yinghua Hu; Peter A. Beerel; Pierluigi Nuzzo 002 (SecDev, 2019)

Toward Efficient Evaluation of Logic Encryption Schemes: Models and Metrics. - Yinghua Hu; Vivek V. Menon; Andrew G. Schmidt; Joshua S. Monson; Matthew French; Pierluigi Nuzzo 002 (CoRR, 2019)

FPGA Virtualization for Deprecated Devices. - Ian D. Taras; Andrew G. Schmidt (FCCM, 2020)

Emulating and Verifying Sensing, Computation, and Communication in Distributed Remote Sensing Systems. - Matthew French; Marco Paolieri; Vivek V. Menon; Andrew G. Schmidt (IGARSS, 2020)

P2M-DeTrack: Processing-in-Pixel-in-Memory for Energy-efficient and Real-Time Multi-Object Detection and Tracking. - Gourav Datta; Souvik Kundu 002; Zihan Yin; Joe Mathai; Zeyu Liu 003; Zixu Wang; Mulin Tian; Shunlin Lu; Ravi Teja Lakkireddy; Andrew G. Schmidt; Wael Abd-Almageed; Ajey P. Jacob; et al. (VLSI-SoC, 2022)

Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures. - Naifeng Zhang; Austin Ebel; Negar Neda; Patrick Brinich; Benedict Reynwar; Andrew G. Schmidt; Mike Franusich; Jeremy Johnson 001; Brandon Reagen; Franz Franchetti (HPEC, 2023)

TREBUCHET: Fully Homomorphic Encryption Accelerator for Deep Computation. - David Bruce Cousins; Yuriy Polyakov; Ahmad Al Badawi; Matthew French; Andrew G. Schmidt; Ajey P. Jacob; Benedict Reynwar; Kellie Canida; Akhilesh R. Jaiswal; Clynn Mathew; Homer Gamil; Negar Neda; et al. (IACR Cryptol. ePrint Arch., 2023)

RPU: The Ring Processing Unit. - Deepraj Soni; Negar Neda; Naifeng Zhang; Benedict Reynwar; Homer Gamil; Benjamin Heyman; Mohammed Thari Nabeel; Ahmad Al Badawi; Yuriy Polyakov; Kellie Canida; Massoud Pedram; Michail Maniatakos; et al. (IACR Cryptol. ePrint Arch., 2023)