Reducing control overhead in dataflow architectures. - Andrew Petersen 001; Andrew Putnam; Martha Mercaldi; Andrew Schwerin; Susan J. Eggers; Steven Swanson; Mark Oskin (PACT, 2006)

Instruction scheduling for a tiled dataflow architecture. - Martha Mercaldi; Steven Swanson; Andrew Petersen 001; Andrew Putnam; Andrew Schwerin; Mark Oskin; Susan J. Eggers (ASPLOS, 2006)

Area-Performance Trade-offs in Tiled Dataflow Architectures. - Steven Swanson; Andrew Putnam; Martha Mercaldi; Ken Michelson; Andrew Petersen 001; Andrew Schwerin; Mark Oskin; Susan J. Eggers (ISCA, 2006)

Modeling instruction placement on a spatial architecture. - Martha Mercaldi; Steven Swanson; Andrew Petersen 001; Andrew Putnam; Andrew Schwerin; Mark Oskin; Susan J. Eggers (SPAA, 2006)

The WaveScalar architecture. - Steven Swanson; Andrew Schwerin; Martha Mercaldi; Andrew Petersen 001; Andrew Putnam; Ken Michelson; Mark Oskin; Susan J. Eggers (ACM Trans. Comput. Syst., 2007)

CHiMPS: a high-level compilation flow for hybrid CPU-FPGA architectures. - Andrew Putnam; Dave Bennett; Eric Dellinger; Jeff Mason; Prasanna Sundararajan (FPGA, 2008)

CHiMPS: A C-level compilation flow for hybrid CPU-FPGA architectures. - Andrew Putnam; Dave Bennett; Eric Dellinger; Jeff Mason; Prasanna Sundararajan; Susan J. Eggers (FPL, 2008)

MPI as an abstraction for software-hardware interaction for HPRCs. - Manuel Saldaña; Arun Patel; Christopher A. Madill; Daniel Nunes; Danyao Wang; Henry Styles; Andrew Putnam; Ralph Wittig; Paul Chow (HPRCTA@SC, 2008)

Performance and power of cache-based reconfigurable computing. - Andrew Putnam; Susan J. Eggers; Dave Bennett; Eric Dellinger; Jeff Mason; Henry Styles; Prasanna Sundararajan; Ralph Wittig (FPGA, 2009)

Dynamic vectorization in the E2 dynamic multicore architecture. - Andrew Putnam; Aaron Smith; Doug Burger (SIGARCH Comput. Archit. News, 2010)

MPI as a Programming Model for High-Performance Reconfigurable Computers. - Manuel Saldaña; Arun Patel; Christopher A. Madill; Daniel Nunes; Danyao Wang; Paul Chow; Ralph Wittig; Henry Styles; Andrew Putnam (ACM Trans. Reconfigurable Technol. Syst., 2010)

Inspection resistant memory: Architectural support for security from physical examination. - Jonathan Valamehr; Melissa Chase; Seny Kamara; Andrew Putnam; Daniel Shumow; Vinod Vaikuntanathan; Timothy Sherwood (ISCA, 2012)

How to implement effective prediction and forwarding for fusable dynamic multicore architectures. - Behnam Robatmili; Dong Li; Hadi Esmaeilzadeh; Madhu Saravana Sibi Govindan; Aaron Smith; Andrew Putnam; Doug Burger; Stephen W. Keckler (HPCA, 2013)

Inspection-Resistant Memory Architectures. - Jonathan Kaveh Valamehr; Melissa Chase; Seny Kamara; Andrew Putnam; Daniel Shumow; Vinod Vaikuntanathan; Timothy Sherwood (IEEE Micro, 2013)

Accelerating Homomorphic Evaluation on Reconfigurable Hardware. - Thomas Pöppelmann; Michael Naehrig; Andrew Putnam; Adrián Macías (IACR Cryptol. ePrint Arch., 2015)

Agile Co-Design for a Reconfigurable Datacenter. - Shlomi Alkalay; Hari Angepat; Adrian M. Caulfield; Eric S. Chung; Oren Firestein; Michael Haselman; Stephen Heil; Kyle Holohan; Matt Humphrey; Tamás Juhász; Puneet Kaur; Sitaram Lanka; et al. (FPGA, 2016)

The configurable cloud - accelerating hyperscale datacenter services with FPGAs. - Andrew Putnam (FPT, 2016)

A cloud-scale acceleration architecture. - Adrian M. Caulfield; Eric S. Chung; Andrew Putnam; Hari Angepat; Jeremy Fowers; Michael Haselman; Stephen Heil; Matt Humphrey; Puneet Kaur; Joo-Young Kim 001; Daniel Lo; Todd Massengill; et al. (MICRO, 2016)

A reconfigurable fabric for accelerating large-scale datacenter services. - Andrew Putnam; Adrian M. Caulfield; Eric S. Chung; Derek Chiou; Kypros Constantinides; John Demme; Hadi Esmaeilzadeh; Jeremy Fowers; Gopi Prashanth Gopal; Jan Gray; Michael Haselman; Scott Hauck; et al. (Commun. ACM, 2016)

Designing and Programming the Configurable Cloud. - Andrew Putnam (Conf. Computing Frontiers, 2017)

FPGAs in the Datacenter: Combining the Worlds of Hardware and Software Development. - Andrew Putnam (ACM Great Lakes Symposium on VLSI, 2017)

KV-Direct: High-Performance In-Memory Key-Value Store with Programmable NIC. - Bojie Li; Zhenyuan Ruan; Wencong Xiao; Yuanwei Lu; Yongqiang Xiong; Andrew Putnam; Enhong Chen; Lintao Zhang (SOSP, 2017)

Configurable Clouds. - Adrian M. Caulfield; Eric S. Chung; Andrew Putnam; Hari Angepat; Daniel Firestone; Jeremy Fowers; Michael Haselman; Stephen Heil; Matt Humphrey; Puneet Kaur; Joo-Young Kim 001; Daniel Lo; et al. (IEEE Micro, 2017)

Azure Accelerated Networking: SmartNICs in the Public Cloud. - Daniel Firestone; Andrew Putnam; Sambrama Mundkur; Derek Chiou; Alireza Dabagh; Mike Andrewartha; Hari Angepat; Vivek Bhanu; Adrian M. Caulfield; Eric S. Chung; Harish Kumar Chandrappa; Somesh Chaturmohta; et al. (NSDI, 2018)

Introduction to the Special Section on Deep Learning in FPGAs. - Deming Chen; Andrew Putnam; Steven J. E. Wilton (ACM Trans. Reconfigurable Technol. Syst., 2018)

What To Do With Datacenter FPGAs Besides Deep Learning. - Andrew Putnam (FPGA, 2020)