Zeitbeschränkte Clusterung zur Design-Space-Exploration geclusterter VLIW-Prozessoren. - Andy Heinig; Mario Schölzel (MBMV, 2006)

Integration of multi physics modeling of 3D stacks into modern 3D data structures. - Peter Schneider; Andy Heinig; Robert Fischbach; Jens Lienig; Sven Reitz; Jörn Stolle; Andreas Wilde (3DIC, 2010)

Multi-step approach for thermal optimization of 3D-IC and package. - Andy Heinig; Christoph Sohrmann (3DIC, 2011)

Layout dependent synthesis for manufacturing costs optimized 3D integrated systems. - Andy Heinig (3DIC, 2013)

XML-Based Hierarchical Description of 3D Systems and SIP. - Susann Wolf; Andy Heinig; Uwe Knöchel (IEEE Des. Test, 2013)

Design rule check and layout versus schematic for 3D integration and advanced packaging. - Robert Fischbach; Andy Heinig; Peter Schneider (3DIC, 2014)

System integration - The bridge between More than Moore and More Moore. - Andy Heinig; Manfred Dietrich; Andreas Herkersdorf; Felix Miller; Thomas Wild; Kai Hahn; Armin Grünewald; Rainer Brück 001; Steffen Krohnert; Jochen Reisinger (DATE, 2014)

Effizienter Design Rule Check von 3D Systemaufbauten mit einer hierarchischen XML-basierten Modellierungssprache. - Robert Fischbach; Michael Dittrich; Andy Heinig (MBMV, 2014)

Current and future 3D activities at Fraunhofer. - Andy Heinig; Muhammad Waqas Chaudhary; Peter Schneider; Peter Ramm; Josef Weber (3DIC, 2015)

Enabling automatic system design optimization through Assembly Design Kits. - Andy Heinig; Robert Fischbach (3DIC, 2015)

Interposer based integration to achieve high speed interfaces for ADC application. - Muhammad Waqas Chaudhary; Andy Heinig; Michael Dittrich (3DIC, 2016)

Co-design of CML IO and Interposer channel for low area and power signaling. - Muhammad Waqas Chaudhary; Andy Heinig (DDECS, 2016)

Fraunhofer's Initial and Ongoing Contributions in 3D IC Integration. - Peter Ramm; Armin Klumpp; Christof Landesberger; Josef Weber; Andy Heinig; Peter Schneider; Günter Elst; Manfred Engelhardt (3DIC, 2019)

Interconnect Aware Power Optimization of Low Swing Driver for Multi-Chip Interfaces. - Muhammad Waqas Chaudhary; Andy Heinig; Bhaskar Choubey (ICECS, 2020)

13-Gb/s Transmitter for Bunch of Wires Chip-to-Chip Interface Standard. - Muhammad Waqas Chaudhary; Andy Heinig; Bhaskar Choubey (MWSCAS, 2020)