A 16b 250MS/s IF-sampling pipelined A/D converter with background calibration. - Ahmed M. A. Ali; Andy Morgan; Christopher Dillon; Greg Patterson; Scott Puckett; Mike Hensley; Russell Stop; Paritosh Bhoraskar; Scott Bardsley; David Lattimore; Jeff Bray; Carroll Speir; et al. (ISSCC, 2010)

A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and dither. - Ahmed M. A. Ali; Hüseyin Dinc; Paritosh Bhoraskar; Scott Puckett; Andy Morgan; Ning Zhu; Qicheng Yu; Christopher Dillon; Bryce Gray; Jonathan Lanford; Matthew McShea; Ushma Mehta; et al. (VLSI Circuits, 2016)