Design and Implementation of a Hardware Module for Equalisation in A 4G MIMO Receiver. - Angel Fernandez Herrero; Alberto Jimenez-Pacheco; Gabriel Caffarena; Javier Casajús-Quirós (FPL, 2006)

Design and Implementation in FPGA of a MIMO Decoder for a 4G Wireless Receiver. - Alberto Jimenez-Pacheco; Angel Fernandez Herrero; Javier Casajús-Quirós (ICECS, 2006)

A Web-Based Environment Providing Remote Access To FPGA Platforms For Teaching Digital Hardware Design. - Angel Fernandez Herrero; Ignacio Elguezábal; Marisa López-Vallejo (e-Learning, 2008)

Design and Implementation of a Hardware Module for MIMO Decoding in a 4G Wireless Receiver. - Alberto Jimenez-Pacheco; Angel Fernandez Herrero; Francisco Javier Casajús-Quirós (VLSI Design, 2008)

SQNR estimation of non-linear fixed-point algorithms. - Gabriel Caffarena; Juan A. López; Angel Fernandez Herrero; Carlos Carreras (EUSIPCO, 2010)

Fast fixed-point optimization of DSP algorithms. - Gabriel Caffarena; Carlos Carreras; Juan A. López; Angel Fernandez Herrero (VLSI-SoC, 2010)

SQNR Estimation of Fixed-Point DSP Algorithms. - Gabriel Caffarena; Carlos Carreras; Juan A. López; Angel Fernandez Herrero (EURASIP J. Adv. Signal Process., 2010)

Improved schemes for tracking residual frequency offset in DVB-T systems. - Javier Gonzalez Bayon; Angel Fernandez Herrero; Carlos Carreras (IEEE Trans. Consumer Electron., 2010)

A reduced complexity scheme for carrier frequency synchronization in uplink 802.16e OFDMA. - Javier Gonzalez Bayon; Angel Fernandez Herrero; Carlos Carreras (EURASIP J. Adv. Signal Process., 2012)

Evaluation of Rapid Prototyping solutions for a 802.16d frequency Offset estimation Scheme. - Javier Gonzalez Bayon; Angel Fernandez Herrero; Carlos Carreras (J. Circuits Syst. Comput., 2012)