VERILOR: A Verilog-A Model of Lorentzian Spectra for Simulating Trap-related Noise in CMOS Circuits. - Angeliki Tataridou; Gérard Ghibaudo; Christoforos G. Theodorou (ESSDERC, 2021)

"Pinch to Detect": A Method to Increase the Number of Detectable RTN Traps in Nano-scale MOSFETs. - Angeliki Tataridou; Gérard Ghibaudo; Christoforos G. Theodorou (IRPS, 2021)

Accounting for Current Degradation Effects in the Compact Noise Modeling of Nano-scale MOSFETs. - Angeliki Tataridou; Christoforos G. Theodorou (MOCAST, 2022)