A frequency-reconfigurable multi-standard 65nm CMOS digital transmitter with LTCC interposers. - Nai-Chung Kuo; Bonjern Yang; Chaoying Wu; Lingkai Kong; Angie Wang; Michael Reiha; Elad Alon; Ali M. Niknejad; Borivoje Nikolic (A-SSCC, 2014)

A generator of memory-based, runtime-reconfigurable 2N3M5K FFT engines. - Angie Wang; Jonathan Bachrach; Borivoje Nikolic (ICASSP, 2016)

A 0.37mm2 LTE/Wi-Fi compatible, memory-based, runtime-reconfigurable 2n3m5k FFT accelerator integrated with a RISC-V core in 16nm FinFET. - Angie Wang; Brian C. Richards; Daniel Palmer Dabbelt; Howard Mao; Stevo Bailey; Jaeduk Han; Eric Chang; James Dunn 003; Elad Alon; Borivoje Nikolic (A-SSCC, 2017)

Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations. - Adam M. Izraelevitz; Jack Koenig; Patrick Li; Richard Lin; Angie Wang; Albert Magyar; Donggyu Kim; Colin Schmidt 001; Chick Markley; Jim Lawson; Jonathan Bachrach (ICCAD, 2017)

A 65-nm CMOS Wideband TDD Front-End With Integrated T/R Switching via PA Re-Use. - Xiao Xiao 005; Amanda Pratt; Bonjern Yang; Angie Wang; Ali M. Niknejad; Elad Alon; Borivoje Nikolic (IEEE J. Solid State Circuits, 2017)

A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET. - Stevo Bailey; Jaeduk Han; Paul Rigge; Richard Lin; Eric Chang; Howard Mao; Zhongkai Wang; Chick Markley; Adam M. Izraelevitz; Angie Wang; Nathan Narevsky; Woo-Rham Bae; et al. (A-SSCC, 2018)

ACED: a hardware library for generating DSP systems. - Angie Wang; Paul Rigge; Adam M. Izraelevitz; Chick Markley; Jonathan Bachrach; Borivoje Nikolic (DAC, 2018)

A Real-Time, Analog/Digital Co-Designed 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET. - Angie Wang; Woo-Rham Bae; Jaeduk Han; Stevo Bailey; Paul Rigge; Orhan Ocal; Zhongkai Wang; Kannan Ramchandran; Elad Alon; Borivoje Nikolic (ESSCIRC, 2018)

A Generated 7GS/s 8b Time-Interleaved SAR ADC with 38.2dB SNDR at Nyquist in 16nm CMOS FinFET. - Jaeduk Han; Eric Chang; Stevo Bailey; Zhongkai Wang; Woo-Rham Bae; Angie Wang; Nathan Narevsky; Amy Whitcombe; Pengpeng Lu; Borivoje Nikolic; Elad Alon (CICC, 2019)

A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance. - Steven Bailey; Paul Rigge; Jaeduk Han; Richard Lin; Eric Chang; Howard Mao; Zhongkai Wang; Chick Markley; Adam M. Izraelevitz; Angie Wang; Nathan Narevsky; Woo-Rham Bae; et al. (IEEE J. Solid State Circuits, 2019)

A Real-Time, 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET. - Angie Wang; Woo-Rham Bae; Jaeduk Han; Stevo Bailey; Orhan Ocal; Paul Rigge; Zhongkai Wang; Kannan Ramchandran; Elad Alon; Borivoje Nikolic (IEEE J. Solid State Circuits, 2019)

Dimensionality of locomotor behaviors in developing C. elegans. - Cera W. Hassinan; Scott C. Sterrett; Brennan Summy; Arnav Khera; Angie Wang; Jihong Bai (PLoS Comput. Biol., 2024)