A Self-Adapted Two-Point Modulation Type-II Digital PLL for Fast Chirp Rate and Wide Chirp-Bandwidth FMCW Signal Generation. - Wei Deng 001; Zipeng Chen; Haikun Jia; Angxiao Yan; Shiyan Sun; Guopei Chen; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2022)

A Fully Integrated Bit-to-Bit 24/48Gb/s QPSK/16-QAM D-Band Transceiver with Mixed-Signal Baseband in 28nm CMOS Technology. - Pingda Guan; Haikun Jia; Wei Deng 001; Ruichang Ma; Mingxing Deng; Jiamin Xue; Angxiao Yan; Shiyan Sun; Zhihua Wang 001; Baoyong Chi (A-SSCC, 2023)

A Transient Enhancement Digital LDO with Adaptive Ripple Cancelation Based on Optimal Compensation Period Approximation. - Angxiao Yan; Wei Deng 001; Haikun Jia; Shiwei Zhang; Baoyong Chi (A-SSCC, 2023)

Transceiver SoC for Wireless Indoor Sensing Data-fusion. - Bufan Zhu; Wei Deng 001; Ziying Huang; Haikun Jia; Haiyang Jia; Angxiao Yan; Yumeng Yang; Junfeng Liu; Yu Fu; Shiyan Sun; Chao Tang; Taikun Ma; et al. (CICC, 2023)

A 6.5-to-8GHz IEEE 802.15.4z-compliant All-Digital UWB Transmitter with Integrated Fast-Settling Master-Slave Regulator. - Ziying Huang; Wei Deng 001; Haikun Jia; Bufan Zhu; Angxiao Yan; Baoyong Chi (ISCAS, 2023)

A 10-to-300MHz Fractional Output Divider with -80dBc Worst-Case Fractional Spurs Using Auxiliary-PLL-Based Background 0th/1st/2nd-Order DTC INL Calibration. - Yumeng Yang; Wei Deng 001; Angxiao Yan; Haikun Jia; Junlong Gong; Zhihua Wang 001; Baoyong Chi (ISSCC, 2023)

An 11.4-to-16.4GHz FMCW Digital PLL with Cycle-slipping Compensation and Back-tracking DPD Achieving 0.034% RMS Frequency Error under 3.4-GHz Chirp Bandwidth and 960-MHz/μs Chirp Slope. - Angxiao Yan; Wei Deng 001; Haikun Jia; Shiyan Sun; Chao Tang; Bufan Zhu; Yu Fu; Hongzhuo Liu; Baoyong Chi (VLSI Technology and Circuits, 2023)

A D-Band Joint Radar-Communication CMOS Transceiver. - Wei Deng 001; Zipeng Chen; Haikun Jia; Pingda Guan; Taikun Ma; Angxiao Yan; Shiyan Sun; Xiangrong Huang; Guopei Chen; Ruichang Ma; Shengnan Dong; Luqiang Duan; et al. (IEEE J. Solid State Circuits, 2023)

A 132-to-163 GHz 4TX/4RX Distributed MIMO FMCW Radar Transceiver with Real-Time Reference-Clock Synchronization Enabling Cooperative Coherent Multistatic Imaging System. - Ruichen Wan; Wei Deng 001; Qixiu Wu; Haikun Jia; W. Rui; Angxiao Yan; Haowen Cai; Sanming Hu; Zhihua Wang 001; Baoyong Chi (VLSI Technology and Circuits, 2024)

A Fully Integrated QPSK/16-QAM D-Band CMOS Transceiver With Mixed-Signal Baseband Circuitry Realizing Digital Interfaces. - Pingda Guan; Ruichang Ma; Haikun Jia; Wei Deng 001; Mingxing Deng; Jiamin Xue; Angxiao Yan; Shiyan Sun; Qiuyu Peng; Teerachot Siriburanon; Robert Bogdan Staszewski; Zhihua Wang 001; et al. (IEEE J. Solid State Circuits, 2024)

19.9 An 11-to-16.4GHz, 3.4GHz/µs-Slope, 5.32GHz-Chirp-Bandwidth, 0.043%-RMS-Frequency-Error FMCW Digital PLL with Posterior-Segment DPD Featuring 5-Chirp-Cycle Convergence Time. - Angxiao Yan; Wei Deng 001; Haikun Jia; Yumeng Yang; Chao Tang; Shiyan Sun; Zhihua Wang 001; Baoyong Chi (ISSCC, 2025)

A Digital-Intensive 1TX/2RX IEEE 802.15.4/4z-Compliant Joint-Radar-Communication-Location Transceiver SoC. - Bufan Zhu; Wei Deng 001; Ziying Huang; Haikun Jia; Haiyang Jia; Angxiao Yan; Yumeng Yang; Junfeng Liu; Yu Fu; Shiyan Sun; Chao Tang; Lixue Kuang; et al. (IEEE J. Solid State Circuits, 2025)