A complete real-time 802.11a baseband receiver implemented on an array of programmable processors. - Anh Thien Tran; Dean Nguyen Truong; Bevan M. Baas (ACSCC, 2008)

A Low-cost High-speed Source-synchronous Interconnection Technique for GALS Chip Multiprocessors. - Anh Thien Tran; Dean Nguyen Truong; Bevan M. Baas (ISCAS, 2009)

A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network. - Anh Thien Tran; Dean Truong; Bevan M. Baas (NOCS, 2009)

A 167-Processor Computational Platform in 65 nm CMOS. - Dean Nguyen Truong; Wayne H. Cheng; Tinoosh Mohsenin; Zhiyi Yu; Anthony T. Jacobson; Gouri Landge; Michael J. Meeuwsen; Christine Watnik; Anh Thien Tran; Zhibin Xiao; Eric W. Work; Jeremy W. Webb; et al. (IEEE J. Solid State Circuits, 2009)

A Reconfigurable Source-Synchronous On-Chip Network for GALS Many-Core Platforms. - Anh Thien Tran; Dean Nguyen Truong; Bevan M. Baas (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

RoShaQ: High-performance on-chip router with shared queues. - Anh Thien Tran; Bevan M. Baas (ICCD, 2011)

Achieving High-Performance On-Chip Networks With Shared-Buffer Routers. - Anh Thien Tran; Bevan M. Baas (IEEE Trans. Very Large Scale Integr. Syst., 2014)