Design and Implementation of the Low Power 0.64mW, 380 KHz Continuous Time Sigma Delta ADC. - Aniruddha Kanhe; Bibhudendra Acharya; R. B. Deshmukh (ICETET, 2011)

Robust Audio steganography based on Advanced Encryption standards in temporal domain. - Aniruddha Kanhe; Gnanasekaran Aghila; Ch. Yaswanth Sai Kiran; Ch. Hanuma Ramesh; Gabbar Jadav; M. Gowtham Raj (ICACCI, 2015)

DCT based Audio Steganography in Voiced and Un-voiced Frames. - Aniruddha Kanhe; Gnanasekaran Aghila (ICIA, 2016)

A DCT-SVD-Based Speech Steganography in Voiced Frames. - Aniruddha Kanhe; Gnanasekaran Aghila (Circuits Syst. Signal Process., 2018)

Robust image-in-audio watermarking technique based on DCT-SVD transform. - Aniruddha Kanhe; Gnanasekaran Aghila (EURASIP J. Audio Speech Music. Process., 2018)

A Blind Audio Watermarking Scheme Employing DCT-HT-SD Technique. - Aniruddha Kanhe; Gnanasekaran Aghila (Circuits Syst. Signal Process., 2019)

Recognition of Spoken Languages from Acoustic Speech Signals Using Fourier Parameters. - Satya Sai Srinivas Nettimi; Sugan Nagarajan; Niladri Kar; Lakshmi Sutha Kumar; Malaya Kumar Nath; Aniruddha Kanhe (Circuits Syst. Signal Process., 2019)

Covert speech communication through audio steganography using DWT and SVD. - Praveen Kumar Kasetty; Aniruddha Kanhe (ICCCNT, 2020)

Digital Architecture for Instantaneous V/UV/S Classification of Noise Free Speech Segments. - Satya Sai Srinivas Nettimi; Sugan Nagarajan; Lakshmi Sutha Kumar; Malaya Kumar Nath; Aniruddha Kanhe (VDAT, 2020)

Speech emotion recognition using cepstral features extracted with novel triangular filter banks based on bark and ERB frequency scales. - Sugan Nagarajan; Satya Sai Srinivas Nettimi; Lakshmi Sutha Kumar; Malaya Kumar Nath; Aniruddha Kanhe (Digit. Signal Process., 2020)

FPGA architecture to perform symmetric extension on signals for handling border discontinuities in FIR filtering. - Praveen Kumar Kasetty; Aniruddha Kanhe (Comput. Electr. Eng., 2022)

An Adaptive Embedding Approach for High Imperceptible and Robust Audio Watermarking Using Framelet Transform and SVD. - Praveen Kumar Kasetty; Aniruddha Kanhe (Circuits Syst. Signal Process., 2023)

Approximate Floating Point Precise Carry Prediction Adder for FIR Filter Applications. - C. Sridhar; Aniruddha Kanhe (Circuits Syst. Signal Process., 2024)

A two stage pipeline architecture for hardware implementation of multi-level decomposition of 1-D framelet transform. - Praveen Kumar Kasetty; Aniruddha Kanhe (Microprocess. Microsystems, 2024)