Practical Aspects of Delay Testing for Nanometer Chips. - Vivek Chickermane; Brion L. Keller; Kevin McCauley; Anis Uzzaman (Asian Test Symposium, 2005)

Low Cost Delay Testing of Nanometer SoCs Using On-Chip Clocking and Test Compression. - Hiroyuki Nakamura; Akio Shirokane; Yoshihito Nishizaki; Anis Uzzaman; Vivek Chickermane; Brion L. Keller; Tsutomu Ube; Yoshihiko Terauchi (Asian Test Symposium, 2005)

Early Life Cycle Yield Learning for Nanometer Devices Using Volume Yield Diagnostics Analysis. - Sanae Seike; Ken Namura; Yukio Ohya; Anis Uzzaman; Shinichi Arima; Dale Meehl; Vivek Chickermane; Azumi Kobayashi; Satoshi Tanaka; Hiroyuki Adachi (ATS, 2006)

A Scalable Architecture for On-Chip Compression: Options and Trade-Offs. - Anis Uzzaman; Brion L. Keller; Vivek Chickermane (ATS, 2006)

Not all Delay Tests Are the Same - SDQL Model Shows True-Time. - Anis Uzzaman; Mick Tegethoff; Bibo Li; Kevin McCauley; Shuji Hamada; Yasuo Sato (ATS, 2006)

A Review of Power Strategies for DFT and ATPG. - Brion L. Keller; Tom Jackson; Anis Uzzaman (ATS, 2007)

Using Programmable On-Product Clock Generation (OPCG) for Delay Test. - Brion L. Keller; Anis Uzzaman; Bibo Li; Thomas J. Snethen (ATS, 2007)

Test Roles in Diagnosis and Silicon Debug. - Anis Uzzaman; Fidel Muradali; Takashi Aikyo; Robert C. Aitken; Tom Jackson; Rajesh Galivanche; Takeshi Onodera (ATS, 2007)

Automated handling of programmable on-product clock generation (OPCG) circuitry for delay test vector generation. - Anis Uzzaman; Bibo Li; Thomas J. Snethen; Brion L. Keller; Gary Grise (ITC, 2007)

Optimizing Test Data Volume Using Hybrid Compression. - Brion L. Keller; Sandeep Bhatia; Thomas Bartenstein; Brian Foutz; Anis Uzzaman (ATS, 2008)

How To Increase the Effectiveness of Yield Diagnostics-Is DFM the Answer to This? - Anis Uzzaman (ATS, 2008)

Why is Conventional ATPG Not Sufficient for Advanced Low Power Designs?. - Krishna Chakravadhanula; Vivek Chickermane; Brion L. Keller; Patrick R. Gallagher Jr.; Anis Uzzaman (Asian Test Symposium, 2009)

A Partially-Exhaustive Gate Transition Fault Model. - Brion L. Keller; Dale Meehl; Anis Uzzaman; Richard Billings (Asian Test Symposium, 2009)

Is Low Power Testing Necessary? What does the Test Industry Truly Need?. - Anis Uzzaman (Asian Test Symposium, 2009)

Automatic Handling of Programmable On-Product Clock Generation (OPCG) Circuitry for Low Power Aware Delay Test. - Anis Uzzaman; Brion L. Keller; Thomas J. Snethen; Kazuhiko Iwasaki; Masayuki Arai (J. Low Power Electron., 2009)

Reduction of Test Data Volume and Improvement of Diagnosability Using Hybrid Compression. - Anis Uzzaman; Brion L. Keller; Brian Foutz; Sandeep Bhatia; Thomas Bartenstein; Masayuki Arai; Kazuhiko Iwasaki (IEICE Trans. Inf. Syst., 2010)