Timing Driven Gate Duplication: Complexity Issues and Algorithms. - Ankur Srivastava 001; Ryan Kastner; Majid Sarrafzadeh (ICCAD, 2000)

Timing driven gate duplication in technology independent phase. - Ankur Srivastava 001; Chunhong Chen; Majid Sarrafzadeh (ASP-DAC, 2001)

Layout aware retiming. - Abhishek Ranjan; Ankur Srivastava 001; V. Karnam; Majid Sarrafzadeh (ACM Great Lakes Symposium on VLSI, 2001)

Design and analysis of physical design algorithms. - Majid Sarrafzadeh; Elaheh Bozorgzadeh; Ryan Kastner; Ankur Srivastava 001 (ISPD, 2001)

Activity-driven clock design. - Amir H. Farrahi; Chunhong Chen; Ankur Srivastava 001; Gustavo E. Téllez; Majid Sarrafzadeh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

On the complexity of gate duplication. - Ankur Srivastava 001; Ryan Kastner; Majid Sarrafzadeh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

On gate level power optimization using dual-supply voltages. - Chunhong Chen; Ankur Srivastava 001; Majid Sarrafzadeh (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Predictability: definition, ananlysis and optimization. - Ankur Srivastava 001; Majid Sarrafzadeh (ICCAD, 2002)

Early evaluation techniques for low power binding. - Eren Kursun; Ankur Srivastava 001; Seda Ogrenci Memik; Majid Sarrafzadeh (ISLPED, 2002)

Predictability: Definition, Analysis and Optimization. - Ankur Srivastava 001; Majid Sarrafzadeh (IWLS, 2002)

Budget Management with Applications. - Chunhong Chen; Elaheh Bozorgzadeh; Ankur Srivastava 001; Majid Sarrafzadeh (Algorithmica, 2002)

Predictability in RT-Level Designs. - Ankur Srivastava 001; Eren Kursun; Majid Sarrafzadeh (J. Circuits Syst. Comput., 2002)

A Probabilistic Approach to Buffer Insertion. - Vishal Khandelwal; Azadeh Davoodi; Akash Nanavati; Ankur Srivastava 001 (ICCAD, 2003)

Achieving Design Closure Through Delay Relaxation Parameter. - Ankur Srivastava 001; Seda Ogrenci Memik; Bo-Kyung Choi; Majid Sarrafzadeh (ICCAD, 2003)

Effective graph theoretic techniques for the generalized low power binding problem. - Azadeh Davoodi; Ankur Srivastava 001 (ISLPED, 2003)

Simultaneous Vt selection and assignment for leakage optimization. - Ankur Srivastava 001 (ISLPED, 2003)

High level techniques for power-grid noise immunity. - Azadeh Davoodi; Vishal Khandelwal; Ankur Srivastava 001 (ACM Great Lakes Symposium on VLSI, 2004)

Variability inspired implementation selection problem. - Azadeh Davoodi; Vishal Khandelwal; Ankur Srivastava 001 (ICCAD, 2004)

Efficient statistical timing analysis through error budgeting. - Vishal Khandelwal; Azadeh Davoodi; Ankur Srivastava 001 (ICCAD, 2004)

Wire-length prediction using statistical techniques. - Jennifer L. Wong; Azadeh Davoodi; Vishal Khandelwal; Ankur Srivastava 001; Miodrag Potkonjak (ICCAD, 2004)

Empirical models for net-length probability distribution and applications. - Azadeh Davoodi; Vishal Khandelwal; Ankur Srivastava 001 (IEEE Trans. Very Large Scale Integr. Syst., 2004)

Timing driven gate duplication. - Ankur Srivastava 001; Ryan Kastner; Chunhong Chen; Majid Sarrafzadeh (IEEE Trans. Very Large Scale Integr. Syst., 2004)

Simultaneous floorplanning and resource binding: a probabilistic approach. - Azadeh Davoodi; Ankur Srivastava 001 (ASP-DAC, 2005)

Wake-up protocols for controlling current surges in MTCMOS-based technology. - Azadeh Davoodi; Ankur Srivastava 001 (ASP-DAC, 2005)

A general framework for accurate statistical timing analysis considering correlations. - Vishal Khandelwal; Ankur Srivastava 001 (DAC, 2005)

VLSI CAD tool protection by birthmarking design solutions. - Lin Yuan; Gang Qu 001; Ankur Srivastava 001 (ACM Great Lakes Symposium on VLSI, 2005)

Variability-Driven Buffer Insertion Considering Correlations. - Azadeh Davoodi; Ankur Srivastava 001 (ICCD, 2005)

Algorithmic and Architectural Design Methodology for Particle Filters in Hardware. - Aswin C. Sankaranarayanan; Rama Chellappa; Ankur Srivastava 001 (ICCD, 2005)

Probabilistic dual-Vth leakage optimization under variability. - Azadeh Davoodi; Ankur Srivastava 001 (ISLPED, 2005)

On effective slack management in postscheduling phase. - Ankur Srivastava 001; Seda Ogrenci Memik; Bo-Kyung Choi; Majid Sarrafzadeh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Voltage scheduling under unpredictabilities: a risk management paradigm. - Azadeh Davoodi; Ankur Srivastava 001 (ACM Trans. Design Autom. Electr. Syst., 2005)

Power-driven simultaneous resource binding and floorplanning: a probabilistic approach. - Azadeh Davoodi; Ankur Srivastava 001 (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Simultaneous Vt selection and assignment for leakage optimization. - Vishal Khandelwal; Azadeh Davoodi; Ankur Srivastava 001 (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Probabilistic evaluation of solutions in variability-driven optimization. - Azadeh Davoodi; Ankur Srivastava 001 (ISPD, 2006)

Probabilistic Evaluation of Solutions in Variability-Driven Optimization. - Azadeh Davoodi; Vishal Khandelwal; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

A statistical methodology for wire-length prediction. - Jennifer L. Wong; Azadeh Davoodi; Vishal Khandelwal; Ankur Srivastava 001; Miodrag Potkonjak (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Effective techniques for the generalized low-power binding problem. - Azadeh Davoodi; Ankur Srivastava 001 (ACM Trans. Design Autom. Electr. Syst., 2006)

Monte-Carlo driven stochastic optimization framework for handling fabrication variability. - Vishal Khandelwal; Ankur Srivastava 001 (ICCAD, 2007)

Statistical timing analysis using Kernel smoothing. - Jennifer L. Wong; Azadeh Davoodi; Vishal Khandelwal; Ankur Srivastava 001; Miodrag Potkonjak (ICCD, 2007)

Variability-driven formulation for simultaneous gate sizing and post-silicon tunability allocation. - Vishal Khandelwal; Ankur Srivastava 001 (ISPD, 2007)

Variability Driven Joint Leakage-Delay Optimization Through Gate Sizing with Provabale Convergence. - Ashish Dobhal; Vishal Khandelwal; Azadeh Davoodi; Ankur Srivastava 001 (VLSI Design, 2007)

Efficient and Accurate Statistical Timing Analysis for Non-Linear Non-Gaussian Variability With Incremental Attributes. - Ashish Dobhal; Vishal Khandelwal; Ankur Srivastava 001 (VLSI Design, 2007)

Active mode leakage reduction using fine-grained forward body biasing strategy. - Vishal Khandelwal; Ankur Srivastava 001 (Integr., 2007)

Leakage Control Through Fine-Grained Placement and Sizing of Sleep Transistors. - Vishal Khandelwal; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

A Quadratic Modeling-Based Framework for Accurate Statistical Timing Analysis Considering Correlations. - Vishal Khandelwal; Ankur Srivastava 001 (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Chip level thermal profile estimation using on-chip temperature sensors. - Yufu Zhang; Ankur Srivastava 001; Mohamed M. Zahran (ICCD, 2008)

Variability-Driven Formulation for Simultaneous Gate Sizing and Postsilicon Tunability Allocation. - Vishal Khandelwal; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Algorithmic and Architectural Optimizations for Computationally Efficient Particle Filtering. - Aswin C. Sankaranarayanan; Ankur Srivastava 001; Rama Chellappa (IEEE Trans. Image Process., 2008)

Variability Driven Gate Sizing for Binning Yield Optimization. - Azadeh Davoodi; Ankur Srivastava 001 (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Basic Algorithmic Techniques. - Vishal Khandelwal; Ankur Srivastava 001 (Handbook of Algorithms for Physical Design Automation, 2008)

Accurate temperature estimation using noisy thermal sensors. - Yufu Zhang; Ankur Srivastava 001 (DAC, 2009)

Adaptive and autonomous thermal tracking for high performance computing systems. - Yufu Zhang; Ankur Srivastava 001 (DAC, 2010)

Thermal and power-aware task scheduling for Hadoop based storage centric datacenters. - Bing Shi 001; Ankur Srivastava 001 (Green Computing Conference, 2010)

Dynamic thermal management for single and multicore processors under soft thermal constraints. - Bing Shi 001; Yufu Zhang; Ankur Srivastava 001 (ISLPED, 2010)

A statistical framework for designing on-chip thermal sensing infrastructure in nano-scale systems. - Yufu Zhang; Bing Shi 001; Ankur Srivastava 001 (ISPD, 2010)

On-chip sensor-driven efficient thermal profile estimation algorithms. - Yufu Zhang; Ankur Srivastava 001; Mohamed M. Zahran (ACM Trans. Design Autom. Electr. Syst., 2010)

Face Detection. - Raghuraman Gopalan; William Robson Schwartz; Rama Chellappa; Ankur Srivastava 001 (Visual Analysis of Humans, 2011)

Adaptable video compression and transmission using lossy and workload balancing techniques. - Domenic Forte; Ankur Srivastava 001 (AHS, 2011)

Energy-aware video coding of multiple views via workload balancing. - Domenic Forte; Ankur Srivastava 001 (AHS, 2011)

Cooling of 3D-IC using non-uniform micro-channels and sensor based dynamic thermal management. - Bing Shi 001; Ankur Srivastava 001 (Allerton, 2011)

Non-uniform micro-channel design for stacked 3D-ICs. - Bing Shi 001; Ankur Srivastava 001; Peng Wang (DAC, 2011)

Resource-aware architectures for particle filter based visual target tracking. - Domenic Forte; Ankur Srivastava 001 (IGCC, 2011)

Energy-aware video storage and retrieval in server environments. - Domenic Forte; Ankur Srivastava 001 (IGCC, 2011)

Liquid cooling for 3D-ICs. - Bing Shi 001; Ankur Srivastava 001 (IGCC, 2011)

Leakage-aware Kalman filter for accurate temperature tracking. - Yufu Zhang; Ankur Srivastava 001 (IGCC, 2011)

Statistical characterization of chip power behavior at post-fabrication stage. - Yufu Zhang; Ankur Srivastava 001 (IGCC, 2011)

Adaptable architectures for distributed visual target tracking. - Domenic Forte; Ankur Srivastava 001 (ICCD, 2011)

Energy-aware and quality-scalable data placement and retrieval for disks in video server environments. - Domenic Forte; Ankur Srivastava 001 (ICCD, 2011)

Unified datacenter power management considering on-chip and air temperature constraints. - Bing Shi 001; Ankur Srivastava 001 (Sustain. Comput. Informatics Syst., 2011)

Accurate Temperature Estimation Using Noisy Thermal Sensors for Gaussian and Non-Gaussian Cases. - Yufu Zhang; Ankur Srivastava 001 (IEEE Trans. Very Large Scale Integr. Syst., 2011)

On improving the uniqueness of silicon-based physically unclonable functions via optical proximity correction. - Domenic Forte; Ankur Srivastava 001 (DAC, 2012)

TSV-constrained micro-channel infrastructure design for cooling stacked 3D-ICs. - Bing Shi 001; Ankur Srivastava 001 (ISPD, 2012)

Manipulating Manufacturing Variations for Better Silicon-Based Physically Unclonable Functions. - Domenic Forte; Ankur Srivastava 001 (ISVLSI, 2012)

Hybrid 3D-IC Cooling System Using Micro-fluidic Cooling and Thermal TSVs. - Bing Shi 001; Ankur Srivastava 001; Avram Bar-Cohen (ISVLSI, 2012)

Accelerating Gate Sizing Using Graphics Processing Units. - Bing Shi 001; Yufu Zhang; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

Thermal and Power-Aware Task Scheduling and Data Placement for Storage Centric Datacenters. - Bing Shi 001; Ankur Srivastava 001 (Handbook of Energy-Aware and Green Computing, 2012)

Detailed electrical and reliability study of tapered TSVs. - Tiantao Lu; Ankur Srivastava 001 (3DIC, 2013)

High performance 3D stacked DRAM processor architectures with micro-fluidic cooling. - Caleb Serafy; Bing Shi 001; Ankur Srivastava 001; Donald Yeung (3DIC, 2013)

Online TSV health monitoring and built-in self-repair to overcome aging. - Caleb Serafy; Ankur Srivastava 001 (DFTS, 2013)

Thermal stress aware 3D-IC statistical static timing analysis. - Bing Shi 001; Ankur Srivastava 001 (ACM Great Lakes Symposium on VLSI, 2013)

Co-optimization of TSV assignment and micro-channel placement for 3D-ICs. - Bing Shi 001; Caleb Serafy; Ankur Srivastava 001 (ACM Great Lakes Symposium on VLSI, 2013)

Temperature tracking: an innovative run-time approach for hardware Trojan detection. - Domenic Forte; Chongxi Bao; Ankur Srivastava 001 (ICCAD, 2013)

Micro-Fluidic Cooling for Stacked 3D-ICs: Fundamentals, Modeling and Design. - Bing Shi 001; Ankur Srivastava 001 (Adv. Comput., 2013)

Co-design of micro-fluidic heat sink and thermal through-silicon-vias for cooling of three-dimensional integrated circuit. - Bing Shi 001; Ankur Srivastava 001; Avram Bar-Cohen (IET Circuits Devices Syst., 2013)

Improving the Quality of Delay-Based PUFs via Optical Proximity Correction. - Domenic Forte; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Energy- and Thermal-Aware Video Coding via Encoder/Decoder Workload Balancing. - Domenic Forte; Ankur Srivastava 001 (ACM Trans. Embed. Comput. Syst., 2013)

Resource-aware architectures for adaptive particle filter based visual target tracking. - Domenic Forte; Ankur Srivastava 001 (ACM Trans. Design Autom. Electr. Syst., 2013)

Thermal-aware sensor scheduling for distributed estimation. - Domenic Forte; Ankur Srivastava 001 (ACM Trans. Sens. Networks, 2013)

Dynamic Thermal Management Under Soft Thermal Constraints. - Bing Shi 001; Yufu Zhang; Ankur Srivastava 001 (IEEE Trans. Very Large Scale Integr. Syst., 2013)

A Secure Algorithm for Task Scheduling against Side-channel Attacks. - Chongxi Bao; Ankur Srivastava 001 (TrustED@CCS, 2014)

Gated low-power clock tree synthesis for 3D-ICs. - Tiantao Lu; Ankur Srivastava 001 (ISLPED, 2014)

Unlocking the true potential of 3D CPUs with micro-fluidic cooling. - Caleb Serafy; Ankur Srivastava 001; Donald Yeung (ISLPED, 2014)

Coupling-aware force driven placement of TSVs and shields in 3D-IC layouts. - Caleb Serafy; Ankur Srivastava 001 (ISPD, 2014)

On application of one-class SVM to reverse engineering-based hardware Trojan detection. - Chongxi Bao; Domenic Forte; Ankur Srivastava 001 (ISQED, 2014)

A geometric approach to chip-scale TSV shield placement for the reduction of TSV coupling in 3D-ICs. - Caleb Serafy; Bing Shi 001; Ankur Srivastava 001 (Integr., 2014)

Optimized Micro-Channel Design for Stacked 3-D-ICs. - Bing Shi 001; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Statistical Framework for Designing On-Chip Thermal Sensing Infrastructure in Nanoscale Systems. - Yufu Zhang; Bing Shi 001; Ankur Srivastava 001 (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Security-Aware Design Flow for 2.5D IC Technology. - Yang Xie 001; Chongxi Bao; Ankur Srivastava 001 (TrustED@CCS, 2015)

Electromigration-aware Clock Tree Synthesis for TSV-based 3D-ICs. - Tiantao Lu; Ankur Srivastava 001 (ACM Great Lakes Symposium on VLSI, 2015)

A security-aware design scheme for better hardware Trojan detection sensitivity. - Chongxi Bao; Yang Xie 001; Ankur Srivastava 001 (HOST, 2015)

3D Integration: New opportunities in defense against cache-timing side-channel attacks. - Chongxi Bao; Ankur Srivastava 001 (ICCD, 2015)

Temperature Tracking: Toward Robust Run-Time Detection of Hardware Trojans. - Chongxi Bao; Domenic Forte; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

TSV Replacement and Shield Insertion for TSV-TSV Coupling Reduction in 3-D Global Placement. - Caleb Serafy; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Modeling and Layout Optimization for Tapered TSVs. - Tiantao Lu; Ankur Srivastava 001 (IEEE Trans. Very Large Scale Integr. Syst., 2015)

ECO Based Placement and Routing Framework for 3D FPGAs with Micro-fluidic Cooling. - Zhiyuan Yang 001; Caleb Serafy; Ankur Srivastava 001 (FCCM, 2016)

Physical Design of 3D FPGAs Embedded with Micro-channel-based Fluidic Cooling. - Zhiyuan Yang 001; Ankur Srivastava 001 (FPGA, 2016)

An optimization-theoretic approach for attacking physical unclonable functions. - Yuntao Liu 001; Yang Xie 001; Chongxi Bao; Ankur Srivastava 001 (ICCAD, 2016)

Voltage Noise Induced DRAM Soft Error Reduction Technique for 3D-CPUs. - Tiantao Lu; Caleb Serafy; Zhiyuan Yang 001; Ankur Srivastava 001 (ISLPED, 2016)

Electromigration-aware placement for 3D-ICs. - Tiantao Lu; Zhiyuan Yang 001; Ankur Srivastava 001 (ISQED, 2016)

Post-Placement Optimization for Thermal-Induced Mechanical Stress Reduction. - Tiantao Lu; Zhiyuan Yang 001; Ankur Srivastava 001 (ISVLSI, 2016)

2.5D/3D Integration Technologies for Circuit Obfuscation. - Yang Xie 001; Chongxi Bao; Yuntao Liu 001; Ankur Srivastava 001 (MTV, 2016)

Thermoelectric Codesign of 3-D CPUs and Embedded Microfluidic Pin-Fin Heatsinks. - Caleb Serafy; Zhiyuan Yang 001; Ankur Srivastava 001; Yuanchen Hu; Yogendra Joshi (IEEE Des. Test, 2016)

Mitigating SAT Attack on Logic Locking. - Yang Xie 001; Ankur Srivastava 001 (IACR Cryptol. ePrint Arch., 2016)

On Reverse Engineering-Based Hardware Trojan Detection. - Chongxi Bao; Domenic Forte; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Security and Vulnerability Implications of 3D ICs. - Yang Xie 001; Chongxi Bao; Caleb Serafy; Tiantao Lu; Ankur Srivastava 001; Mark Tehranipoor (IEEE Trans. Multi Scale Comput. Syst., 2016)

Unlocking the True Potential of 3-D CPUs With Microfluidic Cooling. - Caleb Serafy; Avram Bar-Cohen; Ankur Srivastava 001; Donald Yeung (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Delay Locking: Security Enhancement of Logic Locking against IC Counterfeiting and Overproduction. - Yang Xie 001; Ankur Srivastava 001 (DAC, 2017)

Phase-driven Learning-based Dynamic Reliability Management For Multi-core Processors. - Zhiyuan Yang 001; Caleb Serafy; Tiantao Lu; Ankur Srivastava 001 (DAC, 2017)

Design Space Modeling and Simulation for Physically Constrained 3D CPUs. - Caleb Serafy; Zhiyuan Yang 001; Ankur Srivastava 001 (ACM Great Lakes Symposium on VLSI, 2017)

Exploring timing side-channel attacks on path-ORAMs. - Chongxi Bao; Ankur Srivastava 001 (HOST, 2017)

Template Attack Based Deobfuscation of Integrated Circuits. - Abhishek Chakraborty 001; Yang Xie 001; Ankur Srivastava 001 (ICCD, 2017)

Neural Trojans. - Yuntao Liu 001; Yang Xie 001; Ankur Srivastava 001 (ICCD, 2017)

Introducing TFUE: The trusted foundry and untrusted employee model in IC supply chain security. - Yuntao Liu 001; Chongxi Bao; Yang Xie 001; Ankur Srivastava 001 (ISCAS, 2017)

Power optimizations in MTJ-based Neural Networks through Stochastic Computing. - Ankit Mondal; Ankur Srivastava 001 (ISLPED, 2017)

Security-Aware 2.5D Integrated Circuit Design Flow Against Hardware IP Piracy. - Yang Xie 001; Chongxi Bao; Ankur Srivastava 001 (Computer, 2017)

Correlation Power Analysis Attack against STT-MRAM Based Cyptosystems. - Abhishek Chakraborty 001; Ankit Mondal; Ankur Srivastava 001 (IACR Cryptol. ePrint Arch., 2017)

TSV-Based 3-D ICs: Design Methods and Tools. - Tiantao Lu; Caleb Serafy; Zhiyuan Yang 001; Sandeep Kumar Samal; Sung Kyu Lim; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Low-Power Clock Tree Synthesis for 3D-ICs. - Tiantao Lu; Ankur Srivastava 001 (ACM Trans. Design Autom. Electr. Syst., 2017)

GPU obfuscation: attack and defense strategies. - Abhishek Chakraborty 001; Yang Xie 001; Ankur Srivastava 001 (DAC, 2018)

TimingSAT: timing profile embedded SAT attack. - Abhishek Chakraborty 001; Yuntao Liu 001; Ankur Srivastava 001 (ICCAD, 2018)

In-situ Stochastic Training of MTJ Crossbar based Neural Networks. - Ankit Mondal; Ankur Srivastava 001 (ISLPED, 2018)

Value-driven Synthesis for Neural Network ASICs. - Zhiyuan Yang 001; Ankur Srivastava 001 (ISLPED, 2018)

HMCTherm: a cycle-accurate HMC simulator integrated with detailed power and thermal simulation. - Zhiyuan Yang 001; Michael Zuzak; Ankur Srivastava 001 (MEMSYS, 2018)

Data Driven Optimizations for MTJ based Stochastic Computing. - Ankit Mondal; Ankur Srivastava 001 (CoRR, 2018)

A Combined Optimization-Theoretic and Side- Channel Approach for Attacking Strong Physical Unclonable Functions. - Yuntao Liu 001; Yang Xie 001; Chongxi Bao; Ankur Srivastava 001 (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Mitigating Reverse Engineering Attacks on Deep Neural Networks. - Yuntao Liu 001; Dana Dachman-Soled; Ankur Srivastava 001 (ISVLSI, 2019)

Memory Locking: An Automated Approach to Processor Design Obfuscation. - Michael Zuzak; Ankur Srivastava 001 (ISVLSI, 2019)

Hardware-Software Co-Design Based Obfuscation of Hardware Accelerators. - Abhishek Chakraborty 001; Ankur Srivastava 001 (IACR Cryptol. ePrint Arch., 2019)

In Situ Stochastic Training of MTJ Crossbars With Machine Learning Algorithms. - Ankit Mondal; Ankur Srivastava 001 (ACM J. Emerg. Technol. Comput. Syst., 2019)

Anti-SAT: Mitigating SAT Attack on Logic Locking. - Yang Xie 001; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Enhanced Phase-Driven Q-Learning-Based DRM for Multicore Processors. - Zhiyuan Yang 001; Caleb Serafy; Tiantao Lu; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Reducing Timing Side-Channel Information Leakage Using 3D Integration. - Chongxi Bao; Ankur Srivastava 001 (IEEE Trans. Dependable Secur. Comput., 2019)

StatSAT: A Boolean Satisfiability based Attack on Logic-Locked Probabilistic Circuits. - Ankit Mondal; Michael Zuzak; Ankur Srivastava 001 (DAC, 2020)

Spintronics-based Reconfigurable Ising Model Architecture. - Ankit Mondal; Ankur Srivastava 001 (ISQED, 2020)

ObfusGEM: Enhancing Processor Design Obfuscation Through Security-Aware On-Chip Memory and Data Path Design. - Michael Zuzak; Ankur Srivastava 001 (MEMSYS, 2020)

DRAMsim3: A Cycle-Accurate, Thermal-Capable DRAM Simulator. - Shang Li 001; Zhiyuan Yang 001; Dhiraj Reddy; Ankur Srivastava 001; Bruce L. Jacob (IEEE Comput. Archit. Lett., 2020)

Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking. - Benjamin Tan 001; Ramesh Karri; Nimisha Limaye; Abhrajit Sengupta; Ozgur Sinanoglu; Md. Moshiur Rahman 001; Swarup Bhunia; Danielle Duvalsaint; Ronald D. Blanton; Amin Rezaei 001; Yuanqi Shen; Hai Zhou 001; et al. (CoRR, 2020)

Hardware-Assisted Intellectual Property Protection of Deep Learning Models. - Abhishek Chakraborty 001; Ankit Mondal; Ankur Srivastava 001 (IACR Cryptol. ePrint Arch., 2020)

A Survey on Neural Trojans. - Yuntao Liu 001; Ankit Mondal; Abhishek Chakraborty 001; Michael Zuzak; Nina Jacobsen; Daniel Xing; Ankur Srivastava 001 (IACR Cryptol. ePrint Arch., 2020)

GANRED: GAN-based Reverse Engineering of DNNs via Cache Side-Channel. - Yuntao Liu 001; Ankur Srivastava 001 (IACR Cryptol. ePrint Arch., 2020)

Strong Anti-SAT: Secure and Effective Logic Locking. - Yuntao Liu 001; Michael Zuzak; Yang Xie 001; Abhishek Chakraborty 001; Ankur Srivastava 001 (IACR Cryptol. ePrint Arch., 2020)

Energy-efficient Design of MTJ-based Neural Networks with Stochastic Computing. - Ankit Mondal; Ankur Srivastava 001 (ACM J. Emerg. Technol. Comput. Syst., 2020)

Keynote: A Disquisition on Logic Locking. - Abhishek Chakraborty 001; Nithyashankari Gummidipoondi Jayasankaran; Yuntao Liu 001; Jeyavijayan Rajendran; Ozgur Sinanoglu; Ankur Srivastava 001; Yang Xie 001; Muhammad Yasin; Michael Zuzak (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Invited: Independent Verification and Validation of Security-Aware EDA Tools and IP. - Benjamin Tan 001; Siddharth Garg; Ramesh Karri; Yuntao Liu 001; Michael Zuzak; Abhisek Chakraborty; Ankur Srivastava 001; Omid Aramoon; Qian Xu; Gang Qu 001; Adam A. Porter; Jeno Szep; et al. (DAC, 2021)

A Resource Binding Approach to Logic Obfuscation. - Michael Zuzak; Yuntao Liu 001; Ankur Srivastava 001 (IACR Cryptol. ePrint Arch., 2021)

Enhancing Processor Design Obfuscation Through Security-Aware On-Chip Memory and Data Path Design. - Michael Zuzak; Ankur Srivastava 001 (IACR Cryptol. ePrint Arch., 2021)

Robust and Attack Resilient Logic Locking with a High Application-Level Impact. - Yuntao Liu 001; Michael Zuzak; Yang Xie 001; Abhishek Chakraborty 001; Ankur Srivastava 001 (ACM J. Emerg. Technol. Comput. Syst., 2021)

Evaluating the Security of Delay-Locked Circuits. - Abhishek Chakraborty 001; Yuntao Liu 001; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Trace Logic Locking: Improving the Parametric Space of Logic Locking. - Michael Zuzak; Yuntao Liu 001; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Ising-FPGA: A Spintronics-based Reconfigurable Ising Model Solver. - Ankit Mondal; Ankur Srivastava 001 (ACM Trans. Design Autom. Electr. Syst., 2021)

A Survey on Side-Channel-based Reverse Engineering Attacks on Deep Neural Networks. - Yuntao Liu 001; Michael Zuzak; Daniel Xing; Isaac McDaniel; Priya Mittu; Olsan Ozbay; Abir Akib; Ankur Srivastava 001 (AICAS, 2022)

Hardware IP Protection against Confidentiality Attacks and Evolving Role of CAD Tool. - Swarup Bhunia; Amitabh Das; Saverio Fazzari; Vivian Kammler; David Kehlet; Jeyavijayan Rajendran; Ankur Srivastava 001 (ICCAD, 2022)

A Combined Logical and Physical Attack on Logic Obfuscation. - Michael Zuzak; Yuntao Liu 001; Isaac McDaniel; Ankur Srivastava 001 (ICCAD, 2022)

A Black-Box Sensitization Attack on SAT-Hard Instances in Logic Obfuscation. - Isaac McDaniel; Michael Zuzak; Ankur Srivastava 001 (ICCD, 2022)

DynaMarks: Defending Against Deep Learning Model Extraction Using Dynamic Watermarking. - Abhishek Chakraborty 001; Daniel Xing; Yuntao Liu 001; Ankur Srivastava 001 (CoRR, 2022)

Evaluating the Security of Logic-Locked Probabilistic Circuits. - Michael Zuzak; Ankit Mondal; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

TimingCamouflage+ Decamouflaged. - Priya Mittu; Yuntao Liu 001; Ankur Srivastava 001 (ACM Great Lakes Symposium on VLSI, 2023)

Low Power Logic Obfuscation Through System Level Clock Gating. - Daniel Xing; Yuntao Liu 001; Ankur Srivastava 001 (ISLPED, 2023)

Low Overhead System-Level Obfuscation through Hardware Resource Sharing. - Daniel Xing; Michael Zuzak; Ankur Srivastava 001 (ISQED, 2023)

Logic Locking based Trojans: A Friend Turns Foe. - Yuntao Liu 001; Aruna Jayasena; Prabhat Mishra 001; Ankur Srivastava 001 (CoRR, 2023)

Introduction to the Special Issue on CAD for Security: Pre-silicon Security Sign-off Solutions Through Design Cycle. - Farimah Farahmandi; Ankur Srivastava 001; Giorgio Di Natale; Mark Tehranipoor (ACM J. Emerg. Technol. Comput. Syst., 2023)

Security-Aware Resource Binding to Enhance Logic Obfuscation. - Michael Zuzak; Yuntao Liu 001; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

A High Level Approach to Co-Designing 3D ICs. - Daniel Xing; Ankur Srivastava 001 (DAC, 2024)

HQ-DTM: A Hierarchical Q-learning Algorithm for Dynamic Thermal Management of Multi-core Processors. - Abir Ahsan Akib; Ankur Srivastava 001 (ISLPED, 2024)

3D-Aware Low Power High-level Resource Binding and Co-Design. - Daniel H. Xing; Ankur Srivastava 001 (ISLPED, 2024)

Co-Design for Heterogeneous Integration: High Level Decisions to the Rescue. - Daniel Xing; Abir Akib; Yuntao Liu 001; Ankur Srivastava 001 (MWSCAS, 2024)

Removal of SAT-Hard Instances in Logic Obfuscation Through Inference of Functionality. - Isaac McDaniel; Michael Zuzak; Ankur Srivastava 001 (ACM Trans. Design Autom. Electr. Syst., 2024)

Security Advantages and Challenges of 3D Heterogeneous Integration. - Yuntao Liu 001; Daniel Xing; Isaac McDaniel; Olsan Ozbay; Abir Akib; Mumtahina Islam Sukanya; Sanjay Rekhi; Ankur Srivastava 001 (Computer, 2024)

Security Evaluation of State Space Obfuscation of Hardware IP through a Red Team-Blue Team Practice. - Md. Moshiur Rahman 001; Jim Geist; Daniel Xing; Yuntao Liu 001; Ankur Srivastava 001; Travis Meade; Yier Jin; Swarup Bhunia (ACM Trans. Design Autom. Electr. Syst., 2024)

SymRTLO: Enhancing RTL Code Optimization with LLMs and Neuron-Inspired Symbolic Reasoning. - Yiting Wang; Wanghao Ye; Ping Guo 007; Yexiao He; Ziyao Wang; Bowei Tian; Shwai He; Guoheng Sun; Zheyu Shen; Sihan Chen; Ankur Srivastava 001; Qingfu Zhang 001; et al. (CoRR, 2025)

Hardware-Enabled Mechanisms for Verifying Responsible AI Development. - Aidan O'Gara; Gabriel Kulp; Will Hodgkins; James Petrie; Vincent Immler; Aydin Aysu; Kanad Basu; Shivam Bhasin; Stjepan Picek; Ankur Srivastava 001 (CoRR, 2025)

Metrics and Methodology for Hardware Security Constructs. - Abir Akib; Sanjay Rekhi; Kostas Amberiadis; Ankur Srivastava 001 (Computer, 2025)

Red Teaming Methodology for Design Obfuscation. - Yuntao Liu 001; Abir Akib; Zelin Lu; Qian Xu; Ankur Srivastava 001; Gang Qu 001; David Kehlet; Nij Dorairaj (CoRR, 2025)