NoCs in Heterogeneous 3D SoCs: Co-Design of Routing Strategies and Microarchitectures. - Jan Moritz Joseph; Lennart Bamberg; Dominik Ermel; Behnam Razi Perjikolaei; Anna Drewes; Alberto García Ortiz; Thilo Pionteck (IEEE Access, 2019)

Optimising Operator Sets for Analytical Database Processing on FPGAs. - Anna Drewes; Jan Moritz Joseph; Bala Gurumurthy; David Broneske; Gunter Saake; Thilo Pionteck (ARC, 2020)

Dead-Ends in FPGAs for Database Acceleration. - Anna Drewes; Martin Koppehel; Thilo Pionteck (SAMOS, 2021)

In-Depth Analysis of OLAP Query Performance on Heterogeneous Hardware. - David Broneske; Anna Drewes; Bala Gurumurthy; Imad Hajjar; Thilo Pionteck; Gunter Saake (Datenbank-Spektrum, 2021)

Modeling Task Mapping for Data-Intensive Applications in Heterogeneous Systems. - Martin Wilhelm; Hanna Geppert; Anna Drewes; Thilo Pionteck (Euro-Par Workshops, 2022)

EmuNoC: Hybrid Emulation for Fast and Flexible Network-on-Chip Prototyping on FPGAs. - Yee Yang Tan; Felix Staudigl; Lukas Jünger 001; Anna Drewes; Rainer Leupers; Jan Moritz Joseph (FPL, 2022)

FPGA-Integrated Bag of Little Bootstraps Accelerator for Approximate Database Query Processing. - Vitalii Burtsev; Martin Wilhelm; Anna Drewes; Bala Gurumurthy; David Broneske; Thilo Pionteck; Gunter Saake (ARC, 2023)

A Flexible and Scalable Reconfigurable FPGA Overlay Architecture for Data-Flow Processing. - Anna Drewes; Vitalii Burtsev; Bala Gurumurthy; Martin Wilhelm; David Broneske; Gunter Saake; Thilo Pionteck (FCCM, 2023)

A comprehensive modeling approach for the task mapping problem in heterogeneous systems with dataflow processing units. - Martin Wilhelm; Hanna Geppert; Anna Drewes; Thilo Pionteck (Concurr. Comput. Pract. Exp., 2023)

An Architectural Template for FPGA Overlays Targeting Data Flow Applications. - Anna Drewes; Vitalii Burtsev; Bala Gurumurthy; Martin Wilhelm; David Broneske; Gunter Saake; Thilo Pionteck (IPDPS (Workshops), 2024)