Using VHDL for datapath synthesis. - Vincent Olive; R. Airiau; J. M. Bergé; Anne Robert (EURO-DAC, 1992)

Towards maximising the use of structural VHDL for synthesis. - Kevin O'Brien; Serge Maginot; Anne Robert (EURO-DAC, 1996)

Translating AADL into BIP - Application to the Verification of Real-Time Systems. - Mohamed Yassin Chkouri; Anne Robert; Marius Bozga; Joseph Sifakis (MoDELS (Workshops), 2008)